在线咨询
eetop公众号 创芯大讲堂 创芯人才网
切换到宽版

EETOP 创芯网论坛 (原名:电子顶级开发网)

手机号码,快捷登录

手机号码,快捷登录

找回密码

  登录   注册  

快捷导航
搜帖子
查看: 2061|回复: 0

[招聘] Senior Digital Communication IC Design Engineer (Shanghai, Zhangjiang)

[复制链接]
发表于 2014-7-7 15:17:22 | 显示全部楼层 |阅读模式

马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。

您需要 登录 才可以下载或查看,没有账号?注册

x

Responsibilities:

[size=10.5000pt]1. Design and implement wireless digital communication system blocks and whole chip including specification trade-offs and optimization, micro-architecture, RTL coding, Synthesis, STA and simulation, FPGA validation, chip testing and characterization.

[size=10.5000pt]2. This is a full-time position with solid equity opportunity.


Qualifications:

[size=10.5000pt]1. 3+ years of experience in Verilog/Synthesis-based IC Design for mass production chips

[size=10.5000pt]2. Familiar with RF Modem design, such as GFSK

[size=10.5000pt]3. Familiar with ARM based MCU design is an advantage.

[size=10.5000pt]4. Experience from front-end to back-end (RTL, synthesis, verification, and test support)

[size=10.5000pt]5. Verilog language and simulation verification experience

[size=10.5000pt]6. Logic Synthesis and Static Timing Analysis

[size=10.5000pt]7. Interface with Place and Route and back-annotated simulation verification

[size=10.5000pt]8. Team-work spirit, and with a strong drive to excel


Please send you resume to hr@macrogiga.com


Thanks.




您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

站长推荐 上一条 /1 下一条

小黑屋| 手机版| 关于我们| 联系我们| 在线咨询| 隐私声明| EETOP 创芯网
( 京ICP备:10050787号 京公网安备:11010502037710 )

GMT+8, 2024-11-5 21:36 , Processed in 0.017065 second(s), 8 queries , Gzip On, Redis On.

eetop公众号 创芯大讲堂 创芯人才网
快速回复 返回顶部 返回列表