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[招聘] [全职]AMD招聘Windows device driver engineer

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发表于 2014-6-23 16:05:39 | 显示全部楼层 |阅读模式

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AMD上海研发中心招聘以下工程师,请感兴趣的候选人务必以“所应聘职位_姓名_学历_专业_现公司名称_工作年限”
为标题,把简历以附件形式发送到maggie1.zhang@amd.com ,请在正文称述应聘理由与优势


1。Senior or MTS Graphics IP Verification Engineer

Job Description:

- Understand the architecture of the graphics IP and functional block beingdesigned
- Build C/C++ model for simulation
- Build test bench and monitors for DUT
- Compose test plan and validation vectors to ensure functional completeness
- Debug function/performance bugs of graphics IP



Preferred Experience:
- Major in EE, CS or related, Master Degree with 6+ years or Bachelor with 8+years working experiences
- Familiar with Linux Environment (including shell scripting and linux gnutools)
- Experience with design for verification (assertion based design strategies,code coverage, functional coverage, test plan, gate-level simulation,back-annotation etc.)
- Should be versatile in any one of the high level verification flow such asSV,VMM,VERA,OVM etc as well as knowledge of industry standard tools forverification
- Should have excellent communication skills (both written and oral)
- Strong problem solving skills



2. MTSDesign Verification Engineer for Graphics Hardware (IP Level)


Location:

- Shanghai
Key Job Functions:
- Understand the chip architecture or algorithm for 3D Graphics
- Compose test plan and validation vectors to ensure functional completeness
- Develop tests for IP level and full chip functional verification.
- Help debug and correct functional errors in the design blocks, using logicabstraction, simulation and debug tools, based on good understanding of thearchitectural specification, RTL and/or device level design of the block andprotocols between the blocks.
- Closely working with multiple BLK Design/Architecture/block DV team toidentify the Milestones and Quality metrics of the project that includesscoping, tracking and delivery.
- Be responsible to mentor and coach the team for greater technical depth inFunctional areas as well as the verification methodology improvement andInfrastructure enhancements to support the design environment


Preferred Experience:
- Major in EE, CS or related, Master Degree with 5+ years or Bachelor with 7+years working experiences
- Versatile in computer architecture or 3D Graphics HW or 3D Algorithm


-Advanced programming knowledge on C++; Programming knowledge in OpenGL, DirectX, OpenCL is optional
- Good understanding of Verification methodology and concepts
- Strong communication skills (both written and oral) and should be able toparticipate cross functional engineering teams geographically.

- Familiar with Linux Environment (including shell scripting and linux gnutools)
- Strong problem solving skills

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