MTS Design Verification Engineer for Graphics Hardware (IP Level)

RecruiterAMD

AMD上海招聘资深工程师，请感兴趣的候选人务必以“所应聘职位_姓名_学历_专业_现公司名称_工作年限” 为标题，把简历以附件形式发送到maggie1.zhang@amd.com ,请在正文称述应聘理由与优势。

Location:

- Shanghai
Key Job Functions:
- Understand the chip architecture or algorithm for 3D Graphics
- Compose test plan and validation vectors to ensure functional completeness
- Develop tests for IP level and full chip functional verification.
- Help debug and correct functional errors in the design blocks, using logic abstraction, simulation and debug tools, based on good understanding of the architectural specification, RTL and/or device level design of the block and protocols between the blocks.
- Closely working with multiple BLK Design/Architecture/block DV team to identify the Milestones and Quality metrics of the project that includes scoping, tracking and delivery.
- Be responsible to mentor and coach the team for greater technical depth in Functional areas as well as the verification methodology improvement and Infrastructure enhancements to support the design environment

Preferred Experience:
- Major in EE, CS or related, Master Degree with 5+ years or Bachelor with 7+ years working experiences
- Versatile in computer architecture or 3D Graphics HW or 3D Algorithm

- Advanced programming knowledge on C++;
Programming knowledge in OpenGL, DirectX, OpenCL is optional
- Good understanding of Verification methodology and concepts
- Strong communication skills (both written and oral) and should be able to participate cross functional engineering teams geographically.
- Familiar with Linux Environment (including shell scripting and linux gnu tools)
- Strong problem solving skills