AMD上海研发中心招聘SMTS for ASIC GFX DFP(design for power) Team

RecruiterAMD

AMD上海研发中心招聘以SMTS design and verification engineer for GFX DFP(design for power) Team，请感兴趣的候选人务必以“所应聘职位_姓名_学历_专业_现公司名称_工作年限” 为标题，把简历以附件形式发送到maggie1.zhang@amd.com ,请在正文称述应聘理由与优势。

Job Summary:

GFXIP Low power design and verification

Job Responsibilities:

In this key role, the candidate will be responsible for low power implementation and verification of Graphics hardware

• Development of infrastructure for verification of hardware in GFX IP.
• Develop low power verification environments for feature test, and use the automated regression infrastructure setup for IP level and IP on SoC level functional verification.
• Low power design and verification for specific hardware functionality in Front-end.
• Improve the low power IP delivery for variant SoCs

Education& Qualifications:

1.
BS, MS or PhD in Electrical Engineering or Computer Science.

2.
10+ years of asic verification or low power design/verification experience

3.
UPF based low power design/verification or computer graphics knowledge are plus

4.
Should have good understanding of Pre-Silicon design process from Architecture, Design, Synthesis and Gate level Implementation till tapeout release.

5.
Advanced programming knowledge on verilog/SystemVerilog, C/C++

6.
Requires demonstrated technical expertise in the areas of low power design/verification methodology.

7.
Knowledge on Perforce, OVL, SVA, SV, UVM, script programming etc.

8.
Should have excellent communication skills (both written and oral) and should be able to participate cross functional engineering teams geographically.