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[招聘] AMD上海研发中心招聘Senior ASIC CAD Engineer

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发表于 2014-5-26 13:49:07 | 显示全部楼层 |阅读模式

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AMD上海研发中心招聘Senior ASIC CAD工程师,请感兴趣的候选人务必以所应聘职位_姓名_学历_专业_现公司名称_工作年限
为标题,把简历以附件形式发送到AMD HR邮箱  maggie1.zhang@amd.com ,请在正文称述应聘理由与优势。


Senior ASIC CAD engineer

1.
Participate in the design and implementation of the leading edge, front-to-back ASIC design flow which covers logical and physical implementation and analysis of complex devices that integrate multiple cores and IP’s from organizations with AMD global teams.

2.
Participate in the research of Design Methodology to improve automation and productivity to produce AMD's new high-quality cutting-edge graphics processing products

3.
Technical support and programming

4.
Interface with EDA venders on technology

Requirements:

1.
Major in EE, CS or related, Master Degree with 3+ years or Bachelor with 5+ years working experiences

2.
Good programming skill with one or more languages (e.g. tcl, perl , python, c/c++, etc) in unix/linux and a strong desire to automate flow

3.
Must have equivalence check experience

4.
Experience in ASIC design (digital design, Front-end and/or Back-end)

5.
Familiar with one or more ASIC flows (logic synthesis, STA, formality check, Design for Power, place & route) and usage of related EDA tools

6.
Good written and spoken English

7.
Good communication skills and be able to work both independently and in a team

Highlight:

1.
The key requirement is experience with UPF :

UPF2.0 preferred but UPF1.0 is acceptable

DC-T power aware synthesis

MVRC checking on RTL used for synthesis and especially on netlist after synthesis

Formality – both power aware with UPF and non-power aware

2.
Hands on DFT implementation experience:

DFT scan implementation using Mentor Testkompress (short term need) or Synopsys DFTMAx (long tern need)

Understanding of scan compression logic generation and stitching of this logic into the design

Understanding of Isolation wrappers for scan

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