【南京】Marvell诚招Physical design engineer

Domiliu

JobTitle:

Physical Design Engineer

Responsibilities:

As member of Marvell central physicaldesign team, you will play a challenging role in assisting multiple Marvelldesign groups in sign-off check includes power/signal integrity analysis (IRdrop, EM, ESD), physical verification (DRC/LVS/ERC/Antenna), chip-level layoutand tapeout, as well as maintaining power analysis and physical verificationflow, custom layout and add-on tools.

Requirements:

o     2+years of direct experience on IC design. BS/MS preferred.

o     Knowledgein some of the following technical areas: custom layout, PCB layout, powerconsumption calculate, timing, chip package.

o     Proventrack records of working independently on running and debugging chip-levelDRC/LVS/ERC/Antenna results.

o     Understandingof power planning, be able to analyze the weakness of power grid and providesolution.

o     BeFamiliar with Laker, Cadence Virtuoso, or Mentor DesignRev. Strong knowledge todebug Mentor’s Calibre or Synopsys’ Hercules tools.

o     Befamiliar with Apache, Encounter Power System, or PrimeRail.

o     Mustbe programming-minded, capable of writing Tcl or Perl.

o     Self-motivatedteam worker, good verbal and written communication skills.

o     Knowledgeof Cadence or Synopsys Place and Route tools a big plus.

o     Mustable to work under tapeout pressure and tight schedule.