在线咨询
eetop公众号 创芯大讲堂 创芯人才网
切换到宽版

EETOP 创芯网论坛 (原名:电子顶级开发网)

手机号码,快捷登录

手机号码,快捷登录

找回密码

  登录   注册  

快捷导航
搜帖子
查看: 1317|回复: 0

[招聘] 北京需要一位“Analog Layout Engineer”

[复制链接]
发表于 2014-3-31 17:16:03 | 显示全部楼层 |阅读模式

马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。

您需要 登录 才可以下载或查看,没有账号?注册

x
【猎头职位:北京需要一位“Analog Layout Engineer”】关键词:Analog Layout Engineer ,联系人:Sam Chen,邮箱sam-chen@kthr.com,QQ:648587455,微信也可查询职位啦!打开手机微信,搜号码“KTHR_COM”或查找微信公众帐号“KT人才”或扫描以上二维码即可添加,欢迎大家关注!

Description
1. The candidate should be having 3-5 years of experience in full customer Layout design of Analog and IO circuits in recent technology nodes. Preference would be given to 40nm/28nm experience.
2. The candidate is expected to have the required know how in usage of the layouts at full chip level
3. The candidate needs to have strong knowledge of layout concepts, limiting design rules and process know-how
4. Candidate has ASIC APR flow (RTL-GDS) experience will be highly preferred.
5. The candidate needs to have good communication skills to communicate/escalate the issues and get them resolved through support teams.
6.BE/ME in electrical/electronic engineering stream with 3-5 years of experience in Layout design of Analog and IO circuits in recent technology nodes
KT人才二维码.jpg
您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

站长推荐 上一条 /1 下一条

小黑屋| 手机版| 关于我们| 联系我们| 隐私声明| EETOP 创芯网
( 京ICP备:10050787号 京公网安备:11010502037710 )

GMT+8, 2025-7-16 07:41 , Processed in 0.018211 second(s), 10 queries , Gzip On, MemCached On.

eetop公众号 创芯大讲堂 创芯人才网
快速回复 返回顶部 返回列表