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数字后端工程师
Education:
BSEE with 2+ years of related experience, MSEE with 1+ years of related experience
Experience:
􀂾 Own any part of the process from netlist handoff to tapeout:
􀂾 Floor planning, power planning and signoff, place and route, timing closure, and physical verification
􀂾 Verify effects of crosstalk and electromigration.
􀂾 Support ASIC die size estimation studies
􀂾 Write scripts in Perl and TCL to achieve higher
􀂾 Efficient with Perl and Tcl programming
DESCRIPTION OF FUNCTION & RESPONSIBILITY:
􀂾 Implement APR from netlist to gds
􀂾 Analyze and fix SI effect
􀂾 Analyze and meet IR-drop and EM requirements
􀂾 Perform ECO and metal spin
􀂾 Support die size estimation
Advance technology node (<= 40nm) experience is preferred. |
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创芯大讲堂
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发表于 2014-3-17 11:30:11
