DSP算法 ic验证 上海

bestgrace

推荐公司信息： DSP Algorithm Engineer:   Job Responsibilities:   As a DSP (Digital Signal Processing) engineer for XXXX, the candidate will join a team of experienced scientists and engineers to develop exciting technology in image and video processing. The position will give you an opportunity to combine your ingenuity with the next generation products in TV and Panel industry. Typical duties performed as follow: 1.    Design and implementation of video post processing algorithm such as true motion based frame interpolation, super-resolution, noise reduction; 2.    Design and implementation of image algorithm such as local dimming, scaling, color enhancement, 2D to 3D 3.    Support the verification and optimization of algorithm according to HW requirements; 4.    Work with image quality team to improve image quality, and tune image quality according to requirements of customers.   Minimum Requirements 1.    Ph. D in EE/CS specializing in digital signal processing, image processing, video processing, computer vision, pattern recognition, or computer graphics; 2.    Thorough background in signal processing, image and video processing, statistical analysis and pattern recognition; 3.    Proven ability in designing, implementing, debugging and understanding complex algorithm; 4.    Solid programming skills in C/C++ and MATLAB; 5.    Strong analytical, creative, self-motivated, good communications skill; 6.    Enjoy R&D work, open and positive attitude;   Additional Preferred Skills 7.    Experience with IC design flow and methodologies; experiences with algorithm design targeted for IC and FPGA; 8.    Previously worked on video processing algorithms such as motion estimation, super resolution, deinterlacing, scaling, noise reduction is a big plus; 9.    Familiar with digital video algorithm and interfaces; 10.    Strong communication skills, presentation skills, good organization and skilled in writing high quality engineering documentation.     职位：集成电路IC设计/应用工程师 岗位职责： ?    This candidate should have mobile/high speed interface background and should be interesting in R&D on Video related technologies. ?    IC/IP background. Be interesting in developing and improving New IP. ?    Integration experience, be able to own testchip tapeout. ?    With at least 3-years IP/Product R&D experience.   Job Description ?    RTL coding, new logic design, simulation, synthesis. ?    Work closely with algorithm engineer to develop/debug new IP/product. Supports FPGA engineer debugging issues on FPGA system. ?    Work closely with system/SW engineer to verificate/validate new IP/product on FPGA/System platform. ?    Deliver design/verification/application documents.     1.Senior ASIC Digital Design Engineer  Responsibilities:  l  Responsible for logic design and verification in low-power wireless communications chips.  l  Also responsible for module-level lint checking, timing checking and formal verification.  Qualifications:  l  Proficiency in logic design, simulation, synthesis and testing.  l  Proficiency in Verilog and its simulation environment.  l  Experience with low-power design.  l  Good knowledge of SOC design.  l  Experience in wireless communication or multimedia technologies is a plus.  l  Experience in ARM and AMBA design is a plus.  l  Self-motivated and good team player.  l  MSEE or BSEE with 4+ years. 2.高级芯片后端设计工程师  Job Description  1、参与超大规模SOC芯片物理设计的全流程； 2、挑战实现业界速度最快、功耗最低的高性能SOC芯片； Qualification 1、本科4年以上相关工作经验（硕士3年以上相关工作经验），并有实际的tapeout经验； 2、熟练掌握深亚微米后端物理设计流程； 3、熟练使用Synopsys, Cadence或Magma等数字芯片物理设计工具；                                                                                                                                          4、熟练使用Calibre等物理验证工具；熟练使用PT等时序验证工具；       职位：IC验证工程师 岗位职责： Responsibilities: ?    Responsibilities will include developing verification environment; ?    developing test plans for and verifying the function of ASIC;  ?    hands-on implementation work for every aspect of ASIC verification, working closely with the system group, architects, design and verification teams;  ?    The successful candidate should have experience going through at least one complete and successful ASIC design/verification cycle from architecting and creating ASIC test environment to full completion of the verification work.  ?    The candidate also needs to have a full understanding of design using Verilog and working experience with SystemVerilog. A strong communication skill in both Chinese and English is required. 任职资格的具体描述： Qualifications: ?    5+ years of ASIC verification experience, complex SOC verification experience is preferred ?    Strong programming skills in SystemVerilog ?    Knowledgeable in Verilog/Verilog-PLI/SystemC/SVA/C/C++ ?    Working Experience with UVM/OVM/VMM (at least one of them) ?    Responsible for implementation of verification environment and generation of high quality test cases.          Grace Li @ Hi-Talent Consulting Co. , Ltd.   上海芯相会企业管理咨询有限公司   上海芯得企业管理咨询有限公司   E-Mail: bestgrace@qq.com   QQ: 2862465331   新浪blog: http://blog.sina.com.cn/u/1767088102  新浪微博:http://weibo.com/bestgrace