A 1.39-V input fast-transient-response digital LDO

wangsun · 发表于 2014-2-28 15:25:57

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帮忙下篇文章A 1.39-V input fast-transient-response digital LDO composed of low-voltage MOS transistors in 40-nm CMOS process
Published in:
Solid State Circuits Conference (A-SSCC), 2011 IEEE Asian Date of Conference:
14-16 Nov. 2011 Page(s):37 - 40 Print ISBN:978-1-4577-1784-0 INSPEC Accession Number:12459733

liazhen · 发表于 2014-2-28 18:58:51

本帖最后由 liazhen 于 2014-3-2 07:13 编辑

回复 1# wangsun
∗ Currently with The Univ
E-mail: masafumi.
Abstract—A fast transient-response digital low-dropout (LDO
voltage regulator comprising only low-voltage MOS transistor
was developed. The input voltage can be higher than th
withstand voltage of the low-voltage MOS transistors by th
proposed withstand-voltage relaxation scheme. The switchin
frequency of 1 GHz can be achieved using small-dimension low
voltage power-MOS transistors. The LDO occupies only 0.05
mm2
area using 40-nm CMOS technology, and covers a wid

semico_ljj · 发表于 2014-2-28 19:58:10

abstract？

wangsun · 发表于 2014-3-3 09:16:28

一篇论文。
To : liazhen
非常感谢，下载了！

MYMISS · 发表于 2015-10-13 14:18:25

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chenxiaoming · 发表于 2015-10-13 15:58:09

kankan

xuriver2012 · 发表于 2015-10-13 17:36:31

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jaypanyang · 发表于 2015-10-13 18:46:21

受益匪浅，好

efong · 发表于 2016-6-9 16:08:58

THANK YOU

efong · 发表于 2016-6-9 16:11:36

THANK YOU

[求助] A 1.39-V input fast-transient-response digital LDO

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