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The Role: ·
ASIC design and verification ·
Work closely with the California teams ·
Support chip tape out and bring up Requirements: ·
3+ years experience in ASIC Verification ·
BS in Electrical Engineering (orequivalent) is a must have, MSEE is desired ·
System on Chip (SOC) VerificationExperience, including AHB/AXI, CPU, Interface integration verification ·
Very familiar with verification languages– Verilog, System-Verilog, and VMM ·
Test plan and test case documentation ·
Functional coverage and code coverage analysis ·
Must be familiar with various scriptinglanguages used in verification, including Perl, Csh, Make, etc. ·
Experience verifying interfaces such asPCIe, Ethernet, DDR, USB ·
Working knowledge of networking protocols802.3 and 802.11, especially Medium Access Control and TCP/IP ·
Working knowledge of C programminglanguage ·
Must be familiar with the ASIC verificationflow from feature identification to test
benchdevelopment and through final tape
outsign-off ·
FPGA emulation experience a plus ·
Chip bring-up experience, including useof Logic Analyzer and Oscilloscope for debugging |