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我有JPEG2000 encoder IP 和JPEG2000 decoder IP,可以用于FPGA上也可用于ASIC上的。 是正规途径的IP核,能提供技术支持服务,并能确保您的项目顺利成功。
JPEG2000 encoder IP core的主要Features:
• Multichannel high-definition (HD) video standard
• Compliant with Digital Cinema Initiatives (DCI) recommendation
• Compliant with International Organization for Standardisation (ISO) or International Electro technical
Commision (IEC) 15444-1: JPEG2000 Image Coding System
• Integrated intellectual property (IP) core offering an Altera® FPGA solution for HD and DCI JPEG 2000 video
applications
• Support for lossless and lossy compression schemes
• Configurable output bit rate: 250 Mbps, 500 Mbps, 1Gbps, or lossless
• Full-frame encoding (no tiling)
• Dynamically configurable encoder parameters, including:
- 5/3 or 9/7 wavelet filter, 0 to 6 levels
-Configurable tile size up to 1080p, 2K, and 4K
- Up to 12-bit precision per color component
- XYZ, RGB, YUV (4:4:4 or 4:2:2) color spaces with support for inverse color transform (ICT) or residual color transform (RCT)
- Configurable bit rate on a frame-by-frame basis with three selectable regulation modes
- Component-position-resolution-layer (CPRL) or layer-resolution-component-position (LRCP) progression order
- Specific quantization factor per subband
• Fully synchronous design |
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