[招聘]synopsys武汉site社招内部推荐职位

snps_recruit

社招内部推荐职位，Synopsys在武汉新开site
招聘IP设计验证工程师，近10多个软件硬件工程师职位，总有一款适合您。
If you are interested in these positions, please send your Chinese and English resume to synopsys_recruit@sina.cn
来信title请标明“[武汉] - 姓名 - 职位”，防止被过滤，请务必同时提供中英文简历（请合并成一个word文件），谢谢
  
01.Title:R&D Engineer, II - asic/Digital Design & Verification Engineer
Location: WUHAN
Job Description and Requirements:
This position of “R&D Engineer, II” is an ASIC/Digital Design & Verification Engineer whose mandate is to participate in the design of semiconductor integrated circuits in compliance with the project’s specifications and Synopsys’ design methodologies. The successful candidate will work on a variety of design and verification tasks, incorporating such tasks as, and not limited to, RTL coding, behavioural coding, testbench and testcase generation, RTL simulation, synthesis, STA, gate-level simulation, formal verification, documentation, and prototype evaluation.   
The duties performed by the R&D Engineer I, will include, though not be limited to:
o     Understand design specifications.
o     Write synthesizable RTL code for circuit portions of integrated circuits.
o     Write behavioural models.
o     Generate testbenches and testcases.
o     Perform complex RTL simulations of circuits, interpret the results and optimize the code until the predetermined functionality is satisfied.
o     Generate timing constraints for synthesizable designs.  
o     May perform logic synthesis and/or static timing analysis.
o     Perform gate-level simulations of circuits, interpret the results and optimize the design until the predetermined functionality and timing is satisfied.
o     May perform mixed-mode simulations.
o     Documentation of functionality, code, verification environments/plans, and design procedures.
o     May participate in prototype evaluation using bench top laboratory instruments or automated test equipment.
o     Communicate with other Synopsys employees regarding customer technical support.
o     May communicate directly with customers regarding technical support.
o    Other related duties as assigned by the manager.
  
The position of R&D Engineer II requires a degree in Engineering or Applied Science (or equivalent) and 2+ years working experience in a related field as well as familiarity with both verilog circuit design and design verification and with generation of timing constraints for ASIC designs.
  
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02.Title:R&D Engineer, II - ARC 32-bit IP Design Engineer
Location: WUHAN
Job Description and Requirements:
We are a team working on producing the highly optimized hardware IP for the ARC family of 32-bit configurable processors.  We are looking for an engineer like you to be part of the team to work on our world-class micro-processors that allow our customers to develop highly optimized and very sophisticated embedded designs.
To develop and maintain our micro-processor hardware IP including, specification, implementation and test To optimize designs for performance, speed, size and power and to improve verification test suites Creation and execution of  Hardware IP Verification Plans Development of processor testbenches using latest verification technology To develop new tests to improve functional/code coverage Interact with tools, modeling and simulation teams globally to deliver optimized solutions for our customers Perform various benchmarking and engineering testing tasks to improve overall product quality Job Requirement for Fresh Grads:
Strong desire to work with embedded processors or processor based systems  
o Knowledge of hdl design and ideally, RISC architectures
o Understanding of programming at assembly and C/C++ level
o Understanding of Hardware Verification Methodologies and best practices – Coverage Driven Verification, constrained random testing, VMM, eRM, OVM, UVM
o Understanding of design/verification languages such as, System Verilog, Verilog, VHDL, Specman e, Vera
o Knowledge of Perl or other scripting languages for flow automation
Knowledge of tools such as, RTL Simulators, e.g. VCS, IES, Questa Knowledge of Operating Systems such as, Linux, Windows XP/Vista Good analytical skills Analysis of product testing requirements Ability to analysis test results and provision reports Excellent written and verbal skills including: Written and spoken English Detailed status reporting Ability to present results to the program management teams A Bachelor’s degree in engineering is a minimum requirement Team player with excellent communications skills motivated to work in a global development environment Self-motivated
  
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03.Title:R&D Engineer, II - IP Design Engineer
Location: WUHAN
Job Description:
As part of the Solutions Group at our Wuhan Design Center, China, the selected candidate would be working on one or more aspects of the development of DesignWare family of synthesizable cores, including Specification, Architecting, Design, Verification and Release engineering for Synopsys IP products. The domains would span across areas such as AMBA (AHB, AXI), USB3, Gigabit Ethernet, Multimedia Cards, and MIPI.
  
The candidate would be assigned to work on either the design or verification tasks based on aptitude and business needs; the candidate will be part of a global team of expert Design/Verification Engineers.
o On the design side, the candidate would work on System level and RTL based hardware design using HDLs such as Verilog, and System Verilog; will use Lint tools for rule checking, Synthesis tools, and timing analysis; the designs may involve use of low power design techniques and implemented using Unified Power Flow.
o On the verification side, candidate would work on latest verification methodologies such as UVM, VMM. The verification tasks would include building or enhancement of CRV based complex test environment, test case writing in OOPS based languages such as SystemVerilog, running tests and debugging failures; will include Functional coverage implementation and would involve usage of industry standard simulators such as VCS.
  
Job Requirement for Fresh Grads:
o BSEE/MSEE in Electrical/ Electronic Engineering or allied subjects with minimum qualification marks of 70 % or CGPA of 7.0 and above, in aggregate of all semesters.
o It is essential that the individual has –
o aptitude to work in the VLSI domain,
o strong Digital Design skills,
o good communication skills,
o good analysis, debug and problem solving skills,
  
The position offers lot of learning opportunities for the candidate by working with the #1 Interface and wide portfolio of IP Provider in the Industry.
  
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04.Title:R&D Engineer, II - Software Engineer, Software Tools/Operating System Development and Integration
Location: WUHAN
Job Description:
We are a team building software engineering tools used with the ARC family of 32-bit configurable processors. Our product line includes open-source and Synopsys-optimized IDEs, compilers, debuggers, utilities, runtime libraries, simulators and operating systems.   We are looking for a software engineer like you to be part of our team to help us develop and benchmark our products by using the skills and knowledge you learned in your computer science program.
Responsibilities:
o     Work on key components of our tools e.g. IDE, libraries, simulators and operating systems e.g. Linux.
o     Develop and execute product test suites
o     Do performance analysis of our tools via benchmarking and instrumentation and maintain our performance regression system
o Diagnose tool issues, create test cases and verify the fixes
Investigate new software standards for use by Synopsys and our customers Required Qualifications:
o     Strong computer science background
o     Proficiency with C, C++ and scripting languages
o     Software development tools experience e.g. subversion, GIT, Bugzilla, Linux, Visual C++, or GNU
o     Excellent teamwork and communication skills
o     Versatility and willing to show initiative
Optional Qualifications
o     Master’s Degree in Computer Science
o     Proficiency with Java for GUI development
o     Embedded system or computer architecture knowledge
o     Initial understanding of internals of development tools such as compilers, debuggers, simulators
o     Assembly language programming experience
o     Use and participation in open source projects
  
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05.Title: R&D Engineer, Sr II (IP Verification)
Location: WUHAN
Job Description:
The candidate will be part of the Solutions Group at our new Design Center at Wuhan, China. This is a Senior Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in the Verification domain.
Job Responsibilities -  
-   Understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create micro-architecture and detailed design documents for some of the components of the Test Environment for the DesignWare family of synthesizable cores in protocol areas such as Ethernet/ USB/ SD, Multi-Media Cards/ AMBA (AMBA2, AXI/ MIPI
-   Be an individual contributor in the Verification Tasks – coding of TE, debug, verification coverage improvement, etc.
-   May contribute to technical review of TE Code of small/ medium complexity.
-   May contribute to technical process and quality improvement to achieve high quality deliveries  
-   May be expected to Solve complex/ abstract problems  
-   The candidate should be able to analyze the coverage metrics and improve them with definition of additional test cases in CRV environment.
-   The candidate will work in a project and team oriented environment with teams spread across multiple sites, worldwide.  
-   Solve complex/ abstract problems
-   May need to take the role of technical lead for a few of the components of the Test Environment and achieve high quality verification with a small team of verification engineers.  
Must have BSEE in EE with 10+ years of relevant experience or MSEE with 8+ years of relevant experience in the following areas:
-   Verification of IP Cores or SoC Designs for Set Top Boxes, Mobile handsets, Smart Devices, etc.
-   Knowledge of one or more of protocols: Ethernet/USB/SDMMC/AMBA (AMBA2, AXI)/ MIPI
-   Hands on experience with creating detailed design of certain components of Test Environment from Functional Specifications/ Test Environment Specifications. The TE must have used methodologies such as UVM/ VMM.
-   Hands on experience with System Verilog/ VERA/ Specman coding and Simulation tools; Knowledge of C++/ OOPs Concepts
-   Experience with Perforce or similar revision control environment
-   Knowledge of Perl/Shell scripts.
-   Exposure to quality processes in the context of IP design and verification is an added advantage
-   Ability to work/ Prior experience as a Technical Lead for a small team is a major plus.
In addition, the candidate will have good communication skills, will be a team player and will have good problem solving skills
  
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06.Title: R&D Engineer, Sr I (Design & Directed Verification)
Location: WUHAN
Job Description:
The candidate will be part of the Solutions Group at our new Design Center at Wuhan, China. This is a Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in the Design & Directed Verification domain. The position offers learning and growth opportunities in Synopsys’ new Design Center at Wuhan.
Job Responsibilities -  
-   Be an individual contributor in the Design Tasks – RTL coding of design, debug, verification coverage improvement in the directed Verilog Test Bench, etc.
-   Create/ work on designs using Low Power Design Methodology.
-   May need to understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create micro-architecture and detailed design documents for some of the components of small complexity functions/ product features for the DesignWare family of synthesizable cores in protocol areas such as Ethernet/ USB/ SD, Multi-Media Cards/ AMBA (AMBA2, AXI/ MIPI
-   Creates deliverables which do not require close review or supervision by a Senior Technical Lead.
-   May learn to do technical review of RTL Code of small complexity.
-   The candidate should be able to analyze the coverage metrics and improve them with definition of additional test cases in directed environment, at least for small/ medium complexity features of the protocol/ product specs.
-   The candidate will work in a project and team oriented environment with teams spread across multiple sites, worldwide.  
Must have BSEE in EE with 6+ years of relevant experience or MSEE with 4+ years of relevant experience in the following areas:
-   Design of IP Cores or SoC Designs for Set Top Boxes, Mobile handsets, Smart Devices, etc.
-   Knowledge of one or more of protocols: Ethernet/USB/SDMMC/AMBA (AMBA2, AXI)/ MIPI
-   Hands on experience with creating micro-architecture/ detailed design from Functional Specifications for small/ medium design complexity. Must have worked on control path oriented designs like asynchronous fifo, DMA architectures, SPRAM/ DPRAM interface design, etc.
-   Hands on experience with Verilog/ System Verilog coding and Simulation tools
-   Synthesis flow and static timing flows, Formal checking, etc is a must for candidates with design background  
-   Knowledge of C
-   Experience with Perforce or similar revision control environment  
-   Knowledge of Perl/Shell scripts.
In addition, the candidate will have good communication skills, will be a team player and will have good problem solving skills. Candidate may be required to handle complex/ abstract problems
  
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07.Title: Hardware Verification Engineer
Location: WUHAN
Job Description:
We are a team working on producing the highly optimized hardware IP compiler for the ARC family of 32-bit configurable processors.   We are looking for an engineer like you to be part of the team to work on our world-class micro-processors that allow our customers develop highly optimized and very sophisticated embedded designs.
Responsibilities  
o Creation and execution of   Hardware IP Verification Plans
o During the hardware verification phase, you will be expected to work closely with the development teams globally and to sign-off on the test plan and execute upon its contents
Requirements  
o Understanding of Hardware Verification Methodologies and best practices – Coverage Driven Verification, constrained random testing, VMM, eRM, OVM, UVM HDL
o Proficient in verification languages such as, System Verilog, Verilog, VHDL, Specman e, Vera
Ideally, knowledge of, and have verified, processors or processor based systems Knowledge of languages such as,   SystemC, C, Perl, makefile generation Knowledge of tools such as, RTL Simulators, e.g. VCS, IES, Questa Knowledge of Operating Systems such as, Linux, Windows XP/Vista Good analytical skills encompassing: Analysis of product testing requirements Ability to analysis test results and provision reports Excellent written and verbal skills including: Excellent written and spoken English Detailed status reporting Creation, modification and review of test documentation; plans, procedures, scenarios, data, test reports Ability to present verification results to the program management teams BSc or Electrical Engineering as a minimum, or equivalent experience Required Personality Skills Team player keen to work in a global development environment Self motivated Helpful qualifications Experience of working within a global development team
  
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08.Title: System CAE
Location: WUHAN
Job Description:
The candidate will be to work closely with Synopsys customers, enabling them to design embedded systems based hardware through the efficient use of our cpu core offerings. The systems engineer will be required to prepare board-level demos, benchmark ARC technologies and prepare competitive analysis. The systems engineer will also be required to investigate and answer in-depth technical questions about Synopsys ARC processors as well as the RTL design / debug / verification.
  
Recent graduates and experienced engineers are welcome. Please submit your resume if you meet the "MUST" requirements and at least one "helpful" qualification.
  
Key responsibilities:
o Provide ARC core specific hardware development ARChitect tool chain support to Synopsys's customer base/field teams
o Strong problem solving ability for RTL and debug through verification capability.
o Provide technical content for Synopsys support site (Application Notes, Technical Articles, FAQs)
o Feedback to R&D and marketing on problematic product areas and required product enhancements
o Participation in product review and release process within technology domain of supported product
  
Requirements (MUST):
o RTL Coding (Verilog/System Verilog/System C).
o Embedded systems programming.  
o Knowledge of at least one microprocessor/dsp architecture.
o Experience of hardware development using Verilog for ASIC or FPGA development including Usage of RTL coding (Verilog/System Verilog), logic simulation and synthesis, timing analysis, and verification methodologies.  
o Strong problem solving ability and debug through verification capability.
o Excellent oral and written communication skills (English).
o Ability and desire to learn.
  
Helpful qualifications:
o Previous customer facing experience desirable.
o Domain knowledge of ISS (instruction Set Simulator) and FPGA emulation a strong plus.
o Comfortable with System C or System Verilog Platform development.
o Knowledge of TCL/TK scripting language.
o Knowledge of silicon level implications on area, low power, and speed performance.  
o Knowledge using compilers, linkers, assemblers and debuggers and run subset test programs on  
o CPU core in C/C++ and assembly code.
o Experience in creating customer oriented documentation through usage of commercial standards, such as FrameMaker or equivalent.
  
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09.Title: R&D Engineer, II-Analog Design Engineer  
Location: WUHAN
Job Description:
In the position of an Analog Design Engineer you will be a part of a team developing high speed analog integrated circuits. We are looking for an engineer with theoretical knowledge and practical experience to contribute to the team. Working from SerDes standards to block specifications, you quickly identify potential circuit architectures and successful design strategies. You must have experience in designing at least two of the following key functions: Clock and Data Recovery, PLLs, Transmitters, Receivers, Bandgaps.  You will work with a cross functional design team of analog and digital designers from a wide variety of backgrounds. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team.  Experience with tools for schematic entry, IC layout and SPICE simulation is required.  Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture.  Experience with TCL, perl, C, python, MATLAB, or other scripting languages is desired.
This position is responsible for designing innovative analog, RF and mixed-signal integrated circuits; developing circuit specifications working from published protocols and standards; and, selecting/creating circuit architectures based on practical experience and knowledge of current circuit literature.  Furthermore you will apply theoretical knowledge to analyze and explain circuit behavior and limitations; implement rigorous simulation test-benches to verify circuit performance; incorporate test and tuning controls; participate in critical peer reviews;  clearly document all circuit details; and guide, implement and review IC layouts.
Generally, this postion requires a BSc in Electrical or Computer Engineering with 5+ years of experience, or MSc with 3+ years of experience, or PhD with 1+ years of experience.  The successful candidate must possess a solid understanding of specialization area plus working knowledge of one other related area;  have the ability to resolve issues in creative ways; exercise judgment in selecting methods and techniques to obtain solutions; execute projects from start to completion; contribute to moderately complex aspects of a project; and, determines and develops recommendations to solutions. The position of Sr II Analog Design Engineer, while working on team-driven or task-oriented projects,  receives little instructions on day-to-day work and general instructions on new assignments and projects; work is evaluated upon completion to ensure objectives have been met. This position may guide more junior peers with aspects of their job and network with senior internal and external personnel in own area of expertise.
  
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10.Title: ASIC/Layout Design Engr, II  
Location: WUHAN
Job Description:
Oversees definition, design, verification, and documentation for ASIC development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Contributes to the development of multi-dimensional designs involving the layout of complex integrated circuits. Evaluates all aspects of the process flow from high-level design to synthesis, place and route, and timing and power use. Analyzes equipment to establish operation data, conducts experimental tests, and evaluates results.
Has a strong desire to learn and explore new technologies. Demonstrates good analysis and problem-solving skills. Prior knowledge and experience of CAD tool development are required.
Typically requires a minimum of 2 years of related experience. Developing professional expertise, applies company policies and procedures to resolve a variety of issues. Has working knowledge of work area and general proficiency with tools, systems, and procedures required to accomplish the job. Exercises judgment within defined procedures and practices to determine appropriate action. Receives general instructions on routine work, detailed instructions on new assignments. Implementations and solutions are reviewed for accuracy and overall adequacy. Builds productive internal/external working relationships. Contacts are primarily within business unit and occasional organizational and external customer contacts on routine matters.
  
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11.Title: R&D Engineer, Sr II  
Location: WUHAN
Job Description:
Responsibilities
o Enhance and maintain the current and future ARC compiler toolchain products. These include compilers, Eclipse IDE, debuggers, linkers/assemblers, Java GUIs, Linux and real-time operating systems, and processor simulation tools.
o Interact with tool engineers and other teams to define, implement and deliver new product features to help Synopsys customers write their software
o Perform various benchmarking and engineering testing tasks to improve overall product quality  
o Assist product marketing and product support teams with pre- and post-sales situations  
Requirements
o Some knowledge or exposure to the internals of software development tools e.g. compiler parsing and back-end code generation, Java GUIs, or open source tool projects
o Programming skills in C++, C and optionally Java
o Professional experience though the software engineering lifecycle i.e. design, coding, debugging, testing, delivery, support
o    Excellent written and verbal skills including:  
o    Written and spoken English
o    Detailed status reporting
o    Ability to present results to management
o    BSCS degree or equivalent, MSCS preferred
Required Personality Skills
o    Team player with good communications skills keen to work in a global development environment  
o    Self-motivated
Helpful qualifications
o    Experience with embedded systems or systems software
o Exposure to assembly language programming and instruction-set architectures
o    Experience of working within a multi-site global development team
  
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snps_recruit

顶，欢迎朋友来信咨询。

snps_recruit

up,想回武汉的朋友看过来。