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[招聘] 北京外资公司Verification Engineer

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发表于 2014-2-10 11:19:59 | 显示全部楼层 |阅读模式

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新年新气象,祝大家马年吉祥,马上发财,马上有喜,马上有offer~~~


北京外资的验证工程师职位,年后想看机会的筒子们速度联系我哦~

headcount只有一个,好机会不等人


联系人猎头Candice Zhang

Tel:+86 2163511401 ext 806Mobile:+86 (0) 13817324639QQ: 192431083MSN:candice.zhang.chn@hotmail.comSkype:candice.zhang.skypeEmail:candice.zhang@yiri-intl.com;192431083@qq.com



---------------------------------参考JD--------------------------------------------------------------

Title: Principle Verification Engineer

Location: BJ


PositionDescription:

Deliver/implement advanced verificationsolutions by utilizing Cadence’s Incisive Verification product portfolio. Theengineer should be able to act as a strong team member and contributor, leadingteam projects and initiatives. Exercise judgment within generally definedpractices and policies.

Specific duties include:

--Deep understanding on ASIC/SOC designflow

--Excellent knowledge of advancedverification methodology like eRM/OVM/UVM

Familiarwith Cadence’s Incisive Plan to Closure Methodology (IPCM)

--Proficiency in System Verilog, System Cand/or e (Specman)

Developingand using Verification Components (eVC,OVC,UVC,VIP)

Developingand using assertion based verification and formal analysis methods

--Skilled in scripting language,such asPerl,C shell,Python,Makefile

Assessingthe project verification requirements

Operatingin a lead role regarding architecting and implementation of projectverification environment/solution.

Maycoordinate/lead others within the scope of a defined project


PositionRequirements:

Essential Qualifications:

- BS degree with 5+ years of applicableexperience,MS degree with 4+ years of applicable experience in electricalengineering,microelectronics,comparable engineering science or solid statephysics.

- Essential that the individualdemonstrates strong communication,verbal and written. Requires goodcommunication skills in English.


Desirable Qualifications:

- A minimum of four years relevantexperience in industry.

- Will have demonstrated hands-onexperience and expertise with Cadence verification design tools or equivalenttools, flows and methodologies required to execute a verification project.

- Will have demonstrated successfulcompletion of 6+ verification projects as an individual contributor

- Will have DDR project verificationexperience

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