马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。
您需要 登录 才可以下载或查看,没有账号?注册
×
1.Senior ASIC Digital Design Engineer
Responsibilities:
l Responsible for logic design and verification in low-power wireless communications chips.
l Also responsible for module-level lint checking, timing checking and formal verification.
Qualifications:
l Proficiency in logic design, simulation, synthesis and testing.
l Proficiency in Verilog and its simulation environment.
l Experience with low-power design.
l Good knowledge of SOC design.
l Experience in wireless communication or multimedia technologies is a plus.
l Experience in ARM and AMBA design is a plus.
l Self-motivated and good team player.
l MSEE or BSEE with 4+ years. 2.高级芯片后端设计工程师
Job Description
1、参与超大规模SOC芯片物理设计的全流程;
2、挑战实现业界速度最快、功耗最低的高性能SOC芯片;
Qualification
1、本科4年以上相关工作经验(硕士3年以上相关工作经验),并有实际的tapeout经验;
2、熟练掌握深亚微米后端物理设计流程; 3、熟练使用Synopsys, Cadence或Magma等数字芯片物理设计工具;
4、熟练使用Calibre等物理验证工具;熟练使用PT等时序验证工具; Best Regards, Jane.Jin Principal Consultant & General Manager @ Hi-Talent Consulting Co.,Ltd. 上海芯相会企业管理咨询有限公司 上海芯得企业管理咨询有限公司 Mob: 18502155252 Skype: ScarlettJaneJin E-Mail: Jane-Jin@Hi-Talent.net QQ: 983144394 Blog: http://blog.sina.com.cn/u/1716864892 Weibo: http://weibo.com/u/1716864892 webside: www.hi-talent.cn [img]http://cli.im/qr/3204734?NU7nR[/img] |