[内推] 上海外资公司内部推荐 资深工程师，设计和验证

andybabi

拖同学委托， 上海某公司内部推荐，  有意者请发送简历给我： andybabi88@126.com



职位1：Senior Digital IC design Engineer   地点：上海Responsibilities:
1.Create the RTL architecture for the algorithm;
2.RTL coding, new logic design, simulation, synthesis.
3.Work closely with algorithm engineer to develop/debug new IP.

4.Supports FPGA engineer debugging issues on FPGA system.
5.Work closely with system/SW engineer to verificate/validate new IP onFPGA/System platform.
6.Deliver design/verification/application documents.
Qualifications:1. Master degree in electronic/computerengineering
2. Very familiar with the Verilog HDL language, and 3+ years verilog codingexperience is a must, video codec design experience is a plus;
3. Design and test experience on DDR controller design is a plus;
4. Very familiar with digital design EDA tools such as DC,PT,DFT,Formality;
5. 3+ years experience on IP simulation and debug process using nc-verilog andVerdi;
6. Very familiar with C and C++;
7. Familiar with FPGA tool, ModelSim, and Synplify.
8. Familiar with the flow of the IC design.
9. Demonstrated abilities in working independently
10. Strong communication skills
----------------------职位2：Senior IC Verification Engineer (Video Codec)  地点：上海The candidate will take part inHEVC/H265 video codec IP development team as verification player. He or shewill take part of these responsibilities:
1.     Co-work with architect and designers to understandarchitecture specification and micro architecture specification.
2.     Extract features or test points from specifications to workout detail test plans.
3.     Develop verification environment and components, like testbench, models, checkers, monitors etc.
4.     Discuss with architect and designers to develop test cases,including corner cases.
5.     Understand cmodel and dump necessary data for stimulus andgolden reference.
6.     Co-work with designers to debug failed tests.
7.     Develop and improve scripts for regression system, flowautomation etc.
8.     Analyze coverage and fill uncovered holes.
Qualifications:1.     3+ years experiencewith Master degree, or 5+ years experience with Bachelor degree.
2.     Video codec ASIC experience and knowledge, like MPEG2/4, H264,etc. HEVC/H265 would be a big plus.
3.     Veteran in ASIC verification, especially inUVM/SystemVerilog/SystemC etc.
4.     Familiar with scripts, like perl/shell/Makefile and Linux OS.
5.     Solid C/C++ knowledge and experience in modeling would be abig plus.
6.     Good team player and quick learner, self motive and quickproblem solving skills.
7.     Fluent oral and written English.