Cadence 2014 校园招聘火热进行中

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Cadence 2014 校园招聘火热进行中

公司介绍

Cadence（Nasdaq: CDNS）是全球电子设计自动化（EDA）领先企业，从事软件与硬件设计工具、芯片知识产权与设计服务。Cadence公司成立于1988年，总部位于加州圣荷塞，其设计中心、研发中心和销售部门分布于世界各地。公司网站www.cadence.com.cn

1992年Cadence 公司进入中国大陆市场，迄今已拥有大量的集成电路 (IC) 及系统设计客户群体。在过去的二十年里，Cadence公司在中国不断发展壮大，建立了北京、上海、深圳分公司以及北京研发中心、上海研发中心，并于2008年将亚太总部设立在上海，Cadence中国现有员工600余人。

北京研发中心（现位于北京市东城区北三环东路36号，北京环球贸易中心）和上海研发中心（现位于上海市浦东嘉里中心）主要承担美国总部EDA软件研发任务，力争提供给用户更加完美的设计工具和全流程服务。Cadence在中国拥有强大的技术支持团队，提供从系统软硬件仿真验证、数字前端和后端及低功耗设计、数模混合RF前端仿真与DFM以及后端物理验证、SiP封装以及PCB设计等技术支持。我们的销售方案中还包括提供数字及模拟IP、专业设计服务，VCAD团队为用户提供高质量、有效的设计和外包服务。

欲了解职位详情请查询“
就业机会”
of www.cadence.com.cn或关注Cadence公众微信平台：Cadence中国招聘

近期宣讲会安排

北京交通大学：

时间：10月29日晚上，19：00 - 21：00 （现场收简历，并赠送精美小礼品）

地址：主校区
逸夫310

清华大学：

时间：10月30日晚上，19：00 - 21：00（现场收简历，并赠送精美小礼品）

地址：微电子所
新所B312

需求专业

计算机，软件工程，微电子，电子信息工程及相关专业

网申联系邮箱

如有兴趣请投递简历至
job_china@cadence.com，并标注你所申请的职位名称，请注意简历的标题：姓名-学校-专业-学历-职位名称

对职位有任何疑问，也可发邮件至该信箱，我们HR同事会及时给你回复并尽快安排面试。

空缺职位

若干软件研发工程师和实习生职位空缺在北京和上海

R&D

1.Senior/Software Engineer--Simulator front-end (Location: BJ)

   

PositionDescription:

1.Research and design simulator frontend

PositionRequirements:        

1.Strong C++ programming andfamiliarity with development under Linux/Unix environment.

2.Proficiency with linux/unix tools.

3.Skills in one or more of script suchas Python, Perl.

4.Familiar with build andversion-control systems.

5.Good English communication skillboth verbally and writing.

6.Good problem solving skill and teamwork spirit.

2.Senior Software Engineer--Virtuoso Design Environment (Location: BJ)

PositionDescription:

Custom digital and analog circuitdesigners must generate and interpret large amounts of complex simulation data.Virtuoso ADE accelerates design by enabling setup reuse, parallelizing anddistributing compute-intensive simulation, and through extensivepost-processing and visualization capabilities.

As an ADE programmer, you will:

1.Work closely with simulation andvisualization teams in order to streamline tool flow and deliver newcapabilities.

2.Implement internal algorithms,provide APIs for other tools to integrate, and provide GUI support for the enduser.

3.Carefully consider data structuresto handle large data sets.

4.Demonstrate strong OO knowledgeusing C++.

5.Write tests to validate yourimplementation.

PositionRequirements:        

1.Skilled in C++ programming, familiarwith development under Linux/Unix environment;

2.Familiarity with GUI development,especially using the Qt toolkit is a plus

3.Familiarity with XML and/or SQL is aplus

4.Be familiar with Analog-signaldesign is a plus;

5.Good English communication skillboth verbally and writing;

6.Good problem solving skill and teamwork spirit;

3.Senior/Software Engineer--Characterization(Location: BJ)

Position Description:            

1.The positions are for a developerwho will be responsible for designing, implementing, and maintaining librarycharacterization and validation software for use with standard cells, memoryand macro blocks, and IO cells

PositionRequirements:        

1.The candidates should have two ormore years of experiences in developing EDA software.

2.Must be proficient in C, C++, TCL,and development in Linux/Unix.

3.Knowledge on semiconductor device isstrong plus.

4.Experience with SPICE or SPICE-likecircuit simulation is important.

5.Knowledge of Verilog and VHDL isalso highly desirable.

6.Have a good understanding of librarycharacterization, IP design, static timing analysis, power analysis, and signalintegrity analysis flows.

7.Minimum Education Required / MinimumExperience Required : MS, EE, CS, Math or Physics 2

8.Preferred Education / PreferredExperience: Ph.D. , EE, CS, Math or Physics 3-5

4.Senior Software Engineer--RF Simulator (Location: BJ)

PositionDescription:

1.The position is responsible fordesigning, implementing and maintaining Cadence Virtuoso platform for RFsimulator. The engineer will be responsible for leading multiple developmentefforts through the development process, and working with a cross-functionalteam to ensure the software is tested, integrated and documented.

PositionRequirements:        

1. Skilled in C++ programming,familiar with development under Linux/Unix environment;

2.Exposure to the Cadence Virtuosoenvironment

3.Familiarity with Analog, RF ormicrowave design is a strong plus;

4.Good English communication skillboth verbally and writing;

5.Good problem solving skill and teamwork spirit;

6. Education Requirement: Master inEE, CS, or related.

7.Experience with RF simulationmethods, such as Harmonic Balance, Envelope and Shooting Newton

8.Understanding of distributed networktheory

9.Background or coursework inRF/microwave circuits

5.Lead PV Engineer - Characterization RD (Location: BJ)

PositionDescription:

The positions are for a PV who will beresponsible for designing, implementing, and maintaining librarycharacterization and validation software for use with standard cells, memoryand macro blocks, and IO cells.

PositionRequirements:

1.The candidates should haveexperiences in EDA software.

2.Must be proficient in C, C++, TCL,Perl and development in Linux/Unix.

3.Knowledge on semiconductor device isstrong plus.

4.Experience with SPICE or SPICE-likecircuit simulation is important.

5.Knowledge of Verilog and VHDL isalso highly desirable.

6.The ideal candidate would have agood understanding of library characterization, IP design, static timinganalysis, power analysis, and signal integrity analysis flows.

7.Minimum Education Required / MinimumExperience Required : Master or Ph.D. in MS, EE,CS, Math or Physics

6.Senior/Software Engineer--PowerRoute (Location: SH)

Position Description:

1. This position is for aR&D engineer to assist in development of special routing(power planning /power routing ...) solution of digital IC design in Encounter.

2. The candidate will beresponsible for designing, developing, troubleshooting and debugging softwareprograms of routing flow and related algorithms.

PositionRequirements   

1. The candidates shouldhave strong software programming skill with C/C++ on Linux/Unix platform.

2. Strong desires to learnand explore new technologies and is able to demonstrate good analysis andproblem solving skills

3. EDA softwaredevelopment experience or IC design knowledge, especially in backend

4. Know basic routingalgorithms.

5. Good Englishcommunication skill, both oral and written.  

Intern(Location: SH)

时间安排：4-5天/周，至少持续6-12个月

要求微电子/电子信息工程/软件工程/计算机等相关专业的2015年及以后毕业的硕士、博士生。

1. RD Intern

PositionDescription:      

Thisintern will work in Encounter placement team and 4 days/week or full timeworking for project development and analysis

Position Requirements:

1.EE/CSMS or PH.D, good at scripting: perl, tcl or C/C++ programming.

2.Couldunderstand the concept of EDA backend design, especially placement and routing

3.Strongmathematics background is a plus.

4.Goodcommunication in English and Chinese, good confidence and good self-motivation.

2.Intern - Product Engineer

PositionDescription:

1. Assist in digital reference flowdevelopment and optimization at advance nodes.

2. Be responsible for developingPerl/Tcl scripts for flow data post-processing, output analysis, etc.

3. Be responsible for variousscripting and system development techniques for high productivity andefficiency.

PositionRequirements:

1. MS or excellent undergraduate, EEor CS background.

2. Strong Tcl/Perl programmingexperience.

3. IC design knowledge and statistictiming analysis knowledge is a plus.

4. Unix System knowledge, vi/TK/CSHwill be a strong plus.

5. Good communication in English andChinese, good self-motivation and strong willing to learn new technologies

3.Intern - PVS/Assura rule deck development

Position Description:

Work in Cadence China Foundry AccessTeam, to assist in PVS/Assura rule deck development and qualification

1. Create test case with VirtuosoLayout for rule deck testing.

2. Develop various scripting forautomatic test case generation flow and automatic QA flow.

3. Assist in rule deck development.

Position Requirements:

1. MS or excellent undergraduate, EEbackground. Semiconductor process knowledge is a must.

2. Layout experience with Virtuoso orother tools is a strong plus. Knowledge in DRC and LVS is preferred.

3. Linux System knowledge, vi/Cshell/TCL/Perl will be a strong plus.

4. Good communication in English andChinese, good self-motivation and strong willing to learn.

4. PV Intern

Position description:

1. Work with PV regression team fordaily yellow and full QA review

2. Help PV team to deliver some systemscripts (by perl/csh)

Position Requirements:           

1. MS or excellent undergraduate,Strong perl programming experience

2. IC design knowledge is necessary,such as statistic timing analysis

3. Unix System knowledge,vi/TCL/TK/CSH will be plus

4. Good communication in English andChinese, good confidence and good self-motivation

5. Can work 4 days/week and last forat least 6 months