验证职位爆棚简历发ic@hi-talent.net

jj_seu

以下4个职位，C Model Developer； FPGA & System；MCU design & verification； Verification

简历发ic@hi-talent.net；QQ: 983144394





验证职位爆棚了，design， C model，MCU，FPGA，System，verification

1. C Model Developer

Position description:

This person will work with RTL, verification and firmware engineers to develop cycle precision C model of design modules. His responsibility includes:

l   Understand design specification

l   Discuss design details with RTL designer

l   Develop and verify cycle precision C model

l   Provide support to verification and firmware engineer

Qualification:

l   新毕业的硕士生或者1年工作经验的本科生，majored in EE

l   Experience in RTL design project

l   Familiar to verilog and C++

l   Experience in micro controller design is a plus



2. FPGA  & System Engineer



The person will be responsible for:

l   Design and integrate an AXI/AHB based system including host processor, DDR controller, SD/MMC, Display I/F and other peripherals., within an IP verification platform

l   Investigate and develop related drivers for the used IP’s in the system;

l   Use ISE/Vivado/Quartus, implement the design to Altera/Xilinx FPGAs,

l   Work with SW engineer, to bring up system/OS on the FPGA prototyping board. Debug and resolve failures with Logic Analyzer and/or ChipScope/SignalTap;



Qualification:

l   2 year experiences in SOC development;

l   Solid skills in logic design with Verilog/VHDL, timing closure and analysis;

l   Familiar with FPGA implementation with ISE/Quartus and debugging;

l   Knowledge and hands-on experiences in at least 1 of the below fields are required;

n   AXI/AHB bus protocols;

n   Design or bring-up of DDR2/3 controller/PHY;

n   Display interfaces/protocols such as LVDS/HDMI;






3. MCU design  and verification



The person will be responsible for the design and verification of micro-controller, including:

l   RTL coding;

l   Functional verification and performance tuning;

l   Synthesis and STA;

l   Develop direct tests and constraint random tests;

l   Coverage data collection and analysis;



Qualification:

l   2 year experiences in logic design, simulation synthesis and timing analysis;

l    Knowledge in RISC processor micro-architecture, familiar with associated tool-chains such as compiler, assembler, debugger etc.;





4. Verification





Job description:

The person will take part in verification of CPU/MCU, including:

l   Maintain and improve the verification environment and flow;

l   Make the verification plan and execute it with System verilog based coverage monitors/assertions;

l   Develop directed tests and constraint random tests;

l   Coverage data collection and analysis;



Qualification:

l  2 year experience on high-level verification methodology (VMM/UVM/OVM)

l  Knowledge of micro-architecture of RISC processors

l   SystemC/SystemVerilog would be a plus;