[猎头职位]Layout Engineer/ASIC Support Engineer/Digital Design engineer

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Job Description – Intermediate Layout Engineer



Job description:

o Layout floor planning, physical layout, routing, and verification including DRC, LVS, and LPE.

o Layout techniques to improve circuit performance.

o Work with design to define optimal layout solutions, based on design objectives.

o Position will be based in Shanghai, China.



Minimum Requirements:  
o BS degree or equivalent experience.

o Experience in analog IC layout.

o Experience in Cadence IC Layout tool set.

o 2+ years of semiconductor layout experience.

o Team-based, cross-functional organizational structure experience preferred.

o Excellent interpersonal, verbal, and written communication.



Behavioral Qualifications:

o Strong communications skills; written, verbal, presentation and listening

o Good interpersonal skills to work in a team environment

o Good command of written and spoken English required

o Excellent organizational skills.

o International travel to USA may be needed.





Job Title: ASIC Support Engineer



General Summary



The ASIC Support Engineer will be responsible for the general support of multiple ASIC and FPGA designs. Ideal candidate will work closely with a small team of support engineers, performing design debug, Verilog RTL simulations, test environment maintenance, and periodic test development. Ideal candidate will be able to learn multiple existing designs down to the functional level and be able to provide root-cause analysis of real-life failures.



Principal Duties and Responsibilities



In a team environment, learn the design and verification environment of multiple ASIC/FPGA chips

Provide failure analysis support in response to field and manufacturing failures

Utilize existing test suites to drive debug efforts

Create new verification tests as necessary to augment existing verification test suites in response to failures observed

Work directly with field support, manufacturing personnel, and design engineers around the globe

Communicate status and root-cause to the technical team lead



Skills



Working knowledge of either the Verilog HDL or VHDL languages.

Demonstrated knowledge of C/C++

Familiar with the Cadence NC-Verilog simulator and a graphical waveform viewer.

Excellent communication, technical skills

Strong sense of urgency and teamwork

Ability to work well both alone or in a small cross-functional team



Education Required: Bachelor of Science in Electrical or Computer Engineering



Experience Required: 3 years of semi-custom or FPGA chip design and/or chip verification experience



Digital Design Engineer



Key Responsibilities:

oPreparation and review of functional and design specification for ASIC (ASIC/FPGA)  
oProve logical functionality and ASIC/FPGA code design/implementation.  
oCoding of digital functionality form top-level down to block level  
overification and simulation of needed functionality on block level  
oMake test plan and test strategy. Ensure effective testing and high quality product delivery.  
oParticipate in system requirement and architecture review.  
oGenerating the test bench environment for the verification  
oResponsible for test planning, test case definition.  


Job Requirements:



SoC development & Methodology

o2+ years of digital (ASIC/FPGA) design experience  
oVery good Verilog knowhow and coding and modeling experience  
oComplete understanding of the digital (ASIC/FPGA) design flow and process.  
oKnowledge of Signal Processing, familiar with Matlab



System



One to Two skills as mentioned below is required:

  

oSolid background in Digital Signal Processing/Mix signal design  
oGood knowledge on Audio/Code  
oGood knowledge on IIR/FIR Filter design  
oGood knowledge on sample rate convert (interpolation/decimation)  


Experience

o2+ years experience in digital/mix signal design.  
Education/Skills

oBachelor/Master of Science (Electrical Engineering)  
oInnovative thinking and team working spirit.  
oBe initiative, capable to analyze and learn  
oHigh team and result orientation are required.  
oKnow how to share knowledge with other colleagues.  
oFluent speaking and writing skills in English  






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Best Regards,

Grace Li

Principal Consultant & General Manager @ Hi-Talent Consulting Co. , Ltd.

上海芯相会企业管理咨询有限公司

E-Mail: bestgrace@qq.com

QQ: 2043753191

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