Job Title |
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1. Sr. Manager for Display –IPE MM |
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2.ASIC Design Engineer Senior/MTS(FCH/NBIO/GPU/ Verification methodology/Multi-Media/display) |
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3.ASIC Design Verification Senior/MTS(FCH/NBIO/Graphics hardware) |
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4.Front-end/Back-End ASIC design CAD engineer |
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5.Windows/Linux 2D/3D graphics driver Senior/MTS |
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6.Device Driver Development Engineer(X86) |
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7.MTS/SE for Camera/ISP SW Development (Android) |
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8.OpenGL/OpenCL/Computing SW Engineer/MTS |
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9.Principle/Senior Staff Design Lead for 10G+ Ethernet IP |
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10.MTS/SMTS of Physical Design |
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11.MTS Design Engineer - DFT |
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12.Sr./MTS ASIC Design Verification Engineer – Video IP DV |
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13.Sr./MTS ASIC Design Verification Engineer - SoC DV |
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14.Sr./MTS Logic Design Engineer |
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15.Sr./MTS GPU Integration Engineer |
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16.MTS ISP IP System Engineer |
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17.ISP tuning engineer |
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18.SMTS /PMTS as SOC Chip Architect |
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19.SMTS as Chip Top Design Lead |
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20.Sr./MTS Windows/Linux Graphic Base Driver |
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21.Trade Compliance Manager |
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Beijing |
Job Title |
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1.Market Intelligence Manager |
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2.Business Development Director, GBU Desktop |
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3.Business Operation Manager, GBU Desktop |
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4.Executive Assistant |
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5. Manager, Design Engineering |
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6. Multimedia Developer Relationship Engineer/Manager |
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