一种4阶sigma delta ADC电路

jackielue · 发表于 2007-2-9 19:04:20

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具体看附件吧

ellejj · 发表于 2007-2-9 21:22:41

不具体介绍一下么

sevid · 发表于 2007-3-25 23:22:21

thanks for share!

nj0000 · 发表于 2007-4-27 23:36:57

A 15 MHz Bandwidth Sigma-Delta ADC with 11 Bits of Resolution
in 0.13μm CMOS
Antonio Di Giandomenico 1), Susana Paton 2), Andreas Wiesbauer 1),
Luis Hernández 2), Thomas Pötscher 1), Lukas Dörrer 1)
antonio.digiandomenico@infineon.com
1) Infineon Technologies Design Centers Austria, Villach, AUSTRIA
2) University Carlos III, Madrid, SPAIN
Abstract
A wide bandwidth continuous time Sigma-Delta ADC
implemented in a 0.13 μm CMOS technology is
introduced. Active blocks are composed of regular
threshold voltage devices only. The circuit is targeted
for wide-bandwidth applications such as video or
wireless base-stations. The 4th-order architecture uses
an OpAmp-RC based loop filter and a 4 bit internal
quantizer. Operated at 300 MHz clock frequency, the
converter achieves a dynamic range of 11 bits over a
bandwidth of 15 MHz. The power dissipation is 70mW
operated from a 1.5V supply.