哪些设计中会故意引入系统失调电压？

ldsh3342 · 发表于 2013-8-18 21:56:09

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各位前辈，请问是否存在故意引入系统失调电压的设计？目的是什么？谢谢！

kennyg8304 · 发表于 2013-8-18 22:04:13

in noisy SOC circuit,
power/gnd power noise,coupling noise will affect comparator's inputs,
introducing some offset into hysteresis comporator can tolerate this noise.

ldsh3342 · 发表于 2013-8-18 22:32:01

回复 2# kennyg8304 在这种情况下，依据什么原则来设置所引入的失调大小？是否需要刻意去设计该失调的大小？谢谢！

kennyg8304 · 发表于 2013-8-19 08:02:10

for example,if your comparator is based on inverter-type(schmitter trigger)
the offset you introduce should be around several hundreds millivolt..

if your comparator is based on open-loop opamp,
the offset you introduce should be around several tens millivolt.

It depends on your application.