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[招聘] Cadence SH 招聘Principal/Lead Front-end Design Engineer

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发表于 2013-7-1 11:03:17 | 显示全部楼层 |阅读模式

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Cadence SH 招聘Principal/Lead Front-end Design Engineer

Ifyou have interest, PLS send your update CV to zhangyl@cadence.com


Position Description:

Deliver/implementIP design. The engineer should be able to act as a strong team member andcontributor.

Specificduties include:

-Proficiency in logic design, simulation, synthesis, STA and testing

-Proficiency in Verilog and its simulation environment

At leastfive years experience driving complex IC development projects, excellentcommunication skills and the uncanny ability to both lead and contribute in acooperative team environment is required.

Position Requirements:         

1.BS degreewith 6~10+ years of applicable experience, MS degree with 4~7+ years ofapplicable experience in electrical engineering, microelectronics, comparableengineering science or solid state physics.

2.Essentialthat the individual demonstrates strong communication, verbal and written. 3.Requiresgood communication skills in English.

发表于 2013-7-3 12:21:50 | 显示全部楼层
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