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本帖最后由 njuptzzl 于 2013-4-26 16:58 编辑
我做插值滤波器的(分三级,第一级补偿滤波器、第二级半带滤波器两倍插值、第三级CIC滤波器8倍插值),用modelsim仿真最终结果不对!
下面是我编的cic程序。clk=4M,clk1=32M
请问我编的CIC程序有问题吗?系数是用matlab FDATOOL得到的,转换成CSD码也没错,经过halfband为什么会失真呢?系统也用simulink建模跑过。
module cic(clk,clk1,reset,halfband_out,cic_out);
input clk,clk1;
input reset;
input [9:0]halfband_out;
output [9:0]cic_out;
reg [9:0]com_delay0[1:0];
reg [9:0]com_delay1[1:0];
reg [9:0]com_delay2[1:0];
reg [9:0]com_out;
reg [18:0]int_delay0;
reg [18:0]int_delay1;
reg [18:0]int_delay2;
reg [18:0] eightbei;
reg[2:0] count;
//cha ling zhi
always@(posedge clk1 or negedge reset)
if(!reset)
eightbei<=0;
else if(count==3'b111)
eightbei<={{9{com_out[9]}},com_out};
else
eightbei<=0;
always@(posedge clk1 or negedge reset)
if(!reset)
count<=0;
else if(count==3'b111)
count<=0;
else
count<=count+1;
//
//梳状部分
always@(posedge clk or negedge reset )
if(!reset)
begin
com_delay0[0]<=0;
com_delay0[1]<=0;
com_delay1[0]<=0;
com_delay1[1]<=0;
com_delay2[0]<=0;
com_delay2[1]<=0;
com_out<=0;
end
else
begin
com_delay0[0]<=halfband_out;
com_delay0[1]<=com_delay0[0];
com_delay1[0]<=com_delay0[0]-com_delay0[1];
com_delay1[1]<=com_delay1[0];
com_delay2[0]<=com_delay1[0]-com_delay1[1];
com_delay2[1]<=com_delay2[0];
com_out<=com_delay2[0]-com_delay2[1];
end
//积分部分
always@(posedge clk1 or negedge reset )
if(!reset)
begin
int_delay0<=0;
int_delay1<=0;
int_delay2<=0;
end
else
begin
int_delay0<=int_delay0+eight_bei;
int_delay1<=int_delay0+int_delay1;
int_delay2<=int_delay1+int_delay2;
end
assign cic_out=int_delay2[18:9];
endmodule
经过补偿滤波器图
经过halfband的图,明显失真
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