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library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity button is
port(
bin : in std_logic_vector(1 downto 0);
bout : out std_logic_vector(7 downto 0));
end entity button;
architecture counter of button is
signal num : integer := 0;
procedure change (a : in integer) is
begin
case a is
when 0 => bout <="11111100";
when 1 => bout <="01100000";
when 2 => bout <="11011010";
when 3 => bout <="11110010";
when 4 => bout <="01100110";
when 5 => bout <="10110110";
when 6 => bout <="11111010";
when 7 => bout <="11100000";
when 8 => bout <="11111110";
when 9 => bout <="11110110";
when others=>bout<="00000000";
end case;
end procedure;
begin
if (bin(0) = '0') then
num <= num+1;
change(num);
end if;
if (bin(1) = '0') then
num <= num-1;
change(num);
end if;
end counter; |
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