VCS编译出错问题求助

bruce421116 · 发表于 2013-1-22 17:19:15

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Starting vcs inline pass...
53 modules and 1 UDP read.
However, due to incremental compilation, no re-compilation is necessary.gcc -pipe -O -I/usr/eda/synopsyscs-mx_B200812/include -c -o rmapats.o rmapats.c
if [ -x ../simv ]; then chmod -x ../simv; fi
g++ -o ../simv -melf_i386 -L/usr/eda/publib/ARM/AT260-MS-26607-r1p5-00rel0/ARM1136JFS_dsm_VCS_Linux_r1p5-00rel0/simulation_models/DSM/synopsys_vcs_verilog_Linux/ARM1136JFS_unlicensed_r1p5-00rel0/../../../ModelManager/MMAPI_5.0.2/Linux/MM/synopsys_vcs_verilog rmapats_mop.o rmapats.o qL0q_1_d.o huan_1_d.o qeIP_1_d.o EKAN_1_d.o YAKG_1_d.o ebPU_1_d.o mvkk_1_d.o pCS5_1_d.o EiAW_1_d.o PY1D_1_d.o ZiCz_1_d.o KF1y_1_d.o W2BC_1_d.o xyep_1_d.o BURj_1_d.o pEwM_1_d.o xdkp_1_d.o roV3_1_d.o 7dPy_1_d.o Ayr0_1_d.o BmyN_1_d.o Dpwh_1_d.o RMZ4_1_d.o DDnp_1_d.o lTbe_1_d.o HkCZ_1_d.o 7unR_1_d.o 0rLH_1_d.o DmZ4_1_d.o KqVW_1_d.o KJJy_1_d.o fRaE_1_d.o 5hcK_1_d.o zQkt_1_d.o d50o_1_d.o 7q9n_1_d.o xTj9_1_d.o k32s_1_d.o 7X3E_1_d.o KgeG_1_d.o K1Eo_1_d.o HhFz_1_d.o 0Yhy_1_d.o ISpl_1_d.o gzYz_1_d.o xqvb_1_d.o ssxz_1_d.o lPyM_1_d.o mXHg_1_d.o Ptuj_1_d.o 3gSR_1_d.o ui2N_1_d.o ne01_1_d.o zgBj_1_d.o SIM_l.o 5NrI_d.o 5NrIB_d.o /usr/eda/synopsyscs-mx_B200812nuxbbvirsim.a /usr/eda/synopsyscs-mx_B200812nuxbbrterrorinf.so /usr/eda/synopsyscs-mx_B200812nuxbbsnpsmalloc.so /usr/eda/synopsyscs-mx_B200812nuxbbvcsnew.so /usr/eda/synopsyscs-mx_B200812nuxb/ctype-stubs_32.a -ldl -lz -lm -lm -lc -ldl
5NrIB_d.o(.data+0x1920): undefined reference to `mm_call'
5NrIB_d.o(.data+0x1924): undefined reference to `mm_misc'
collect2: ld returned 1 exit status
make: *** [product_timestamp] Error 1
Make exited with status 2
CPU time: 4.898 seconds to compile + .496 seconds to elab + 1.432 seconds to link