Level shifters for 1.0-V to 3.3-V high-speed interfaces are
proposed. Level-up shifter uses zero-Vt 3.3-V NMOSs as
voltage clamps to protect 1.0-V NMOS switches from high
voltage stress across the gate oxide. Level-down shifter uses
3.3-V NMOSs as both pull-up and pull-down devices with
supply voltage of 1.0-V and gate voltage swing from 0-V to
3.3-V. The zero-Vt NMOS is a standard MOSFET device in a
0.13-μm CMOS process without adding extra mask or process
step to realize it. Level-up transition from 0.9-V to 3.6-V takes
only 1 ns in time, and the level-down transition has no
minimum core voltage limitation. These circuits do not
consume static DC power, therefore they are very suitable for
low-power and high-speed interfaces in the deep sub-quartermicron
CMOS technologies.