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楼主 |
发表于 2012-11-28 21:43:07
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请参考TRM的2.6.1 Doze Mode.
设置Doze模式分为4步:
1. Software writes to the flash control registers to put all flash pumps to sleep.
2. Software writes to the clock source disable register (CSDIS) to disable the clock sources that are not needed.
3. Software writes to the clock domain disable register (CDDIS) to disable the GCLK (CPU clock), HCLK (system clock), VCLKP (peripheral VBUS clock), VCLK2 (peripheral VBUS clock2), VCLKA1 (asynchronous peripheral VBUS clock1), and VCLKA2 (asynchronous peripheral VBUS clock2).
4. Software “idles” the ARM core, then stops the core clock. |
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