Generation of Time Constants and Stable Transconductances

zylin614 · 发表于 2012-10-18 14:32:36

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JSSC 2001

A method for generating accurately known on-chip time constants
and less accurate but stable transistor transconductances over
process, power-supply, and temperature variations is presented.

This design has been fabricated in a 0.35-um CMOS process, using
an active area of 1200x1200 um^2 and draws 5.8 mA for a 3.3-V
supply.

Generation of Accurate On-Chip Time Constants and Stable Transconductances.pdf (181.29 KB, 下载次数: 48 )