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本帖最后由 Domiliu 于 2012-9-25 15:16 编辑
If you have any interest in the position, please send your bilingual resume as attachments to marvell.recruit@gmail.com
Subject of your email should be “Your Name_University_Applied Position Title”
1、Job title: Firmware Engineer
Department: AP system engineering – SW
Location: Shanghai& Nanjing
Responsibility:
-Responsible for the bare-metal code and Linux kernel
development and debugging for all IP modules in Mobile SoC
-Bring-up the multimedia peripherals on FPGA platform
-Work together with design team to debug the silicon.
-Support for the silicon validation and ATE test.
-Support for the customer designs. Qualifications:
-BSCS/BSEE, MSCS/MSEE preferred, plus 1 - 3 years experience.
-Highly motivated individual with a proven track record.
-Must be able to develop/debug the complex embedded software independently.
-Must be familiar with Contex A9/M3 CPU architecture ( SMP, MMU/MPU, L1 & L2 caches, TCM, Interrupts…),
-Expert programming skills on C/C++ and assembly language
-ARM RealView ICE experience desirable.
-Knowledge of 2D/3D graphics, video and audio codecs, power management is a plus.
-Working experience on Linux kernel and Android, device driver development for Mobile Devices is a plus.
2、Job Title: Physical Design Engineer
Department: COT PD-SH -MTSL
Location: Shanghai / Chengdu
Job Description:
-Physical Design Engineer will support physical design requirement of different business unit of Mavell, the main responsibility is:
-physical implementation, including floorplan, power routing, placement, clock tree synthesis, timing closure, routing, si fixing, drc fixing, dfm ...etc
-physical verification: including low power check, timing analysis, timing eco, xtalk analysis, power analysis, ESD analysis, EM analysis, drc check, lvs check, ant check, erc check ...etc
tapeout: timing signoff, power signoff, design tapeout... etc
Qualification:
-BS/MS in EE/CS required.
-Some knowledge and some experience on process, parameters, synthesis, timing analysis, placement, routing, CTS, SI, power calculation, custom layout, timing analysis and DRC/LVS.
-Familiar with Cadence, Synopsys, Mentor, Magma, Apache… EDA tools and design flow;
-Familiar with Verilog HDL, Spice
-Good programming skill. Capable of writing Tcl or Perl.
-Self-motivated team worker, good verbal and written communication skills in English
-Experience with real project is preferred
3、Job Title: Engineer, Senior ASIC Design
Department: Central Engineering
Location: Beijing/Shanghai/Nanjing
Job Description:As a Digital design engineer, he/she will contribute to the overall SoC development and IP development for the micron-controller oriented SoC Product line, which includes block level micron-architecture design, RTL coding, Simulation, SoC top level integration, verification and chip bring-up.
Qualification: •BS degree in Electrical Engineering +5 years experience (or MS + 3 years) or equivalent in hardware development and system architecture. • Familiar with ASIC design methodologies and flows. • Experience in the usage of state-of-the-art design tools. • Proficient in behavioral and RTL coding, Verification. Verilog is preferred
• Experience in logic synthesis, timing closure. • Experience in Design For Test. • Knowledge of Low Power architecture and design practice is desirable. • Strong verbal and written communication skills and proactive team-work spirit. • Working understanding of various system interconnect protocols such as: AHB, AXI, OCP, APB, and their impact on IP development. 4、Job Title: Web Developer Web开发工程师
Department: AP System Engineering
Location: Shanghai Responsibility: - Complete product development lifecycle of web applications, including participation in requirements gathering, application design, developing code, testing, deployment and maintenance - Develop both front-end/UI and back-end programs Requirements: - Bachelors Degree in Computer Science or equivalent - Proficiency in .NET framework and C# development - Proficiency in asp.net, html, CSS, JavaScript, JQuery, XML and AJAX - Has been through a full-life cycle of web based software development - Familiar with the MVC Architecture/Framework - Good verbal and written communication skills in English - Willing to learn, self-starter, and a good team player
5、Job Title: Lab Technician Department: Channel System Location: Shanghai Description: Silicon Validation Engineering group for Read Channels is responsible for validating all read channel devices designed by Marvell. The activities also include performance measurement and automation of the tools used for validating the read channel. The group is also responsible for the hardware and software design of all tools required for the above two activities.
Qualifications: -5+ years’ working experience in related industry. -College(associate) degree in electrical/mechanical engineering is required. B.S.is preferred. -Be trained formally with SMT techniques and equipments; familiar with SMT equipment and process; -Experience in PCB assembly and rework is required. -Experience in lab management including equipment labeling, calibration scheduling, consumables purchasing and categorization. -Skilled in Excel, Word, PPT -A good command of written English; Responsibility: -PCB boards rework and parts assembly. -Lab equipments calibration. Schedule and monitor status. -Lab hardware management including status tracking/labeling, consumables purchasing, boards/cables shipping and receiving. -Working with company purchasing dept. for setting up purchasing request, preparing documents, and tracking progress. -Reproducing hardware issues and verify once reported by engineers. -Network admin for IT local server maintenance. |