CMOS High Efficiency On-chip PowerManagement

jjw

最新springer analog and signal processing series.
This book is divided into two parts with four chapters. Part 1 (Chaps. 1 and 2)
presents the system point of view on power management in a green electronic
system. Part 2 (Chaps. 3 and 4) goes through details of circuit level power
management IC design.
Chapter 1 introduces the concept of green electronics in face of the power crisis in
portable consumer electronics. It envisions the structure and necessary components
of such a system and identifies power management blocks as the bottle neck for
overall efficiency improvement. As an introduction, it also describes the uniqueness
of power management IC design and the rationale behind the study thereof.
Chapter 2 discusses power management at the system level. A holistic approach
that involves system level software, SoC architecture, and silicon IPs is
presented. Meanwhile, the importance of sleep mode operation for portable and
battery-powered applications is discussed. The runtime extension using sleep-mode
efficiency IPs is quantized, and the circuit level design of these sleep-mode efficient
IPs becomes a theme for the second part of the book.
Chapter 3 starts dealing with power management IC design by analyzing
linear regulators, especially the low drop-out (LDO) topology. Key performance
parameters of LDOs are listed. Their design challenges are also explained, and
existing performance enhancement methods are reviewed. In the quest for full onchip
integration, designs of external capacitor-free LDOs are presented. A novel
sleep-mode ready, area-efficient capacitor- free LDO is proposed with testing
methods and measurement results presented.
Chapter 4 moves on to highly efficient power management IC design, represented
by switching converters. The light-load efficiency of these converters is found to
be insufficient, and the root cause for the efficiency roll-off is identified. Existing
light-load efficiency boosting techniques are then discussed, followed by a proposal
of a long-sleep model (LSM). A design example of a light-load efficient DC–DC
buck converter using the LSM is presented. The characteristics, implementation,
implication, and novelty of the LSM are studied thoroughly.
This book will serve as a reference for analog and power management IC
design engineers in industry, as well as graduate students conducting research in
high efficiency electronics, power management, and analog IC design in CMOS
technologies. It will also be useful for test engineers, project leaders, design
managers, and individuals in marketing and business development.

jamesccp

论坛上早就有了。

liuzhieetop

论坛上早就有了

chenxiaoming

thanks

hanseldsilva3

Cool...........

tingkuya

顶！！！！！！！

xuleiwx

已下载。

pod

多謝分享~~

kglu

VERY GOOD

register.php

多謝分享