NVIDIA急招SOC Verification

NvidiaHR

NVIDIA Shanghai is now lookingfor Verification Engineer. If you are intereted in it. Pls feel free to contact me.

Email: sasu@nvidia.com

MSN: suwei198702@hotmail.com

QQ:524786472  

The JD is as below:

ASIC/SOC VerificationEngineer:

RESPONSIBILITIES:

- RTL design, verification, synthesis for various low powercontrol logic in GPU chips.

- Develop and maintain verification environment at both fullchip & unit level

- Code/functional coverage analysis

- Responsible for running both RTL & gate levelsimulation

- Develop testing and regression methodologies

- Develop/maintain/enhance environmenttools/scripts/makefiles

MINIMUM REQUIREMENTS:

- BSEE/MSEE/BSCS/MSCS with 3+/5+ years of experience in ASICdesign or verification

- Proficient in Verilog HDL

- Familiar with logic simulators and debug tools (VCS,NCSIM, Verdi and etc.)

- Working knowledge in C/C++, Makefile

- Must have strong programming skills in one or morescripting languages: TCL, Perl, Python

- Knowledge in one of the below areas is a big plus

+ UVM/VMM experience

+ Low power design/verification experience (Multi-Voltage,power gating, UPF/APF and etc.)

+ ARM based SoC verification experience

+ AHB/AXI architecture

+ Embedded OS

To find more positions, pls refer to thelink as below:

http://www.nvidia.cn/object/search-job-cn.html

BestRegards,

SarahSu

APACStaffing Team

NVIDIASHANGHAI

Building9,No. 399, Keyuan Road, Zhangjiang Innovation Park, Shanghai, China

Tel+(86 21) 61041139

MP+(86) 15900770601

MSN: suwei198702@hotmail.com

QQ:524786472

angelaqina

好呀。面试都考什么呢，侧重哪方面呢？

jumphigh1987

顶一下，满足条件的快快报名啊