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Job Title: Custom Layout Engineer
NO.16
上海
Job responsibility:
This position will participate in layout design team for analog and mixed signal circuits on CMOS process. Work through entire chip construction process, from preliminary floorplanning, detailed sub-block layout, and global placement and routing. Responsible for running full verification sequence using advanced EDA tools. The responsibilities will include but not limited to: •
Layout floorplanning of large, mixed signal IC •
Transistor level sub-block layout based on schematics provide by designers, including careful analog considerations •
Completion of DRC and LVS check and verification tools •
Hold and attend layout reviews Qualification: •
BSEE or above •
Have 3+ years working experience as a custom layout •
Layout design experience in PLL, SerDes or RF circuit •
Be able to translate circuits schematics directly to layout •
Good at communication with team members •
Understand IC process basics •
Understand circuit basics and how they impact IC layout strategy •
Good English language skill 美资公司,在上海漕河泾。有兴趣可以发简历到hamy_wang@126.com Q: 577477313 |