cadence是全套芯片设计工具包,特别是全定制芯片领域,比mentor和synopsys强。但是没有EM设计包,所以无法仿真transmission line, or sprial inductor etc. In the industor, designers use Sonnet or HFSS 来抽取 transmission line 的参数,然后转换成 RLGC Models for simulations in cadence. 如果工艺文件准确,HFSS+cadence的涉及流程可以很好地match measurement results.
ADS has its own EM simulator: Momentum. 但是ADS不是基于spice网表的集成环境,并且layout不方便,所以很多IC designers don't quite like it.