Cadence BJ 招聘研发类工程师

kengteng

R&D

1. Software Engineer for Fastspice Simulator
(Location: BJ)

Position Description

1.Maintain and develop Cadence fastspice simulator.

2.Be responsible for writing specifications, designing and implementing product enhancements and fixes.

3.Needs to work with other global R&D teams..

  

Position Requirements

1.Education requirement: Master with above 2 years work experience or Ph.D. in EE/CS/related research area.

2.Must be skilled in C/C++ programming, familiar with development under Linux/Unix environment.

3.Strong background in numerical computation and programming.

4.Knowledge of Analog Mixed-signal design and semiconductor device is a strong plus.

5.Good English communication skills both verbally and in writing.

If you have interest,PLS send your CV to zhangyl@cadence.com

2. Senior Software Engineer (Location: BJ)

Job Description

1.Develop, enhance and maintain mixed signal circuit simulator which support Verilog, Verilog-A, Verilog-AMS, VHDL, VHDL-AMS and SystemVerilog.

  

Position Requirements

1.Familiar with Spice, Verilog, Verilog-A, Verilog-AMS, VHDL-AMS language

2.Skilled in C++ programming, familiar with development under Linux/Unix environment.

3.Analog circuit or digital simulator development experiences

4.Be familiar with Analog Mixed-signal design is a plus

5.EE or CS Master degree with at least 2 years related working experience or above

If you have interest,PLS send your CV to zhangyl@cadence.com

3. Senior Software Engineer - Characterization RD
(Location: BJ)

     

Position Description

1.The positions are for a developer who will be responsible for designing, implementing, and maintaining library characterization and validation software for use with standard cells, memory and macro blocks, and IO cells.

Position Requirements

1. The candidates should have two or more years of experiences in developing EDA software.

2.Must be proficient in C, C++, TCL, and development in Linux/Unix.

3.Knowledge on semiconductor device is strong plus.

4.Experience with SPICE or SPICE-like circuit simulation is important.

5.knowledge of Verilog and VHDL is also highly desirable.

6.The ideal candidate would have a good understanding of library characterization, IP design, static timing analysis, power analysis, and signal integrity analysis flows.

7.Minimum Education Required / Minimum Experience Required : MS, EE, CS, Math or Physics 2

8.Preferred Education / Preferred Experience: Ph.D. , EE, CS, Math or Physics 3-5

If you have interest,PLS send your CV to zhangyl@cadence.com

4. Software Engineer for Virtuoso GUI (Location: BJ)

Position Description

1.Candidate will be involved in Development, enhancement and maintain Cadence Virtuoso platform.

2.Candidate will be involved in GUI integrating Cadence simulation product into Cadence Virtuoso platform.

  

Position Requirements

1.BS in CS/EE or similar level of expertise with at least 2 years of working experience.

2.Candidate must have some coding experience. C, C++ are must. QT, STL would be a plus.

3.Better to have experience of using SKILL(Cadence programming language), OpenAccess

4.Highly desirable if the candidate has some GUI coding experience

5.The candidate must some EE knowledge about analog design. Good if the candidate is familiar with Cadence Virtuoso platform.

6.English verbal and written

If you have interest,PLS send your CV to zhangyl@cadence.com

5. Software Engineer for Verilog-A simulator development(Location: BJ)

Position Description

Develop, enhance and maintain Verilog-A simulator.

  

Position Requirements

1.Familiar with Spice, Verilog-A, Verilog-AMS language

2.Skilled in C++ programming, familiar with development under Linux/Unix environment.

3.Analog circuit or digital simulator development experiences is a plus

4.Good mathematic background & knowledge is a plus

5.Be familiar with Analog Mixed-signal design is a plus

6.EE or CS Master degree with related working experience

If you have interest,PLS send your CV to zhangyl@cadence.com

PV

6. Senior Software Engineer - Characterization PV(Location: BJ)

Position Description

PV responsible for testing and maintaining library characterization and validation software for use with standard cells, memory and macro blocks, and IO cells.

  

Position Requirements

1.The candidate should have three years of experience testing EDA software.

2.Software development experience a plus.

3.Must be proficient in C, C++, TCL, and development in Linux/Unix.

4.Knowledge of semiconductor device is strong plus.

5.Experience with SPICE or SPICE-like circuit simulation is important.

6.Knowledge of Verilog and VHDL is also highly desirable.

7.The ideal candidate would have a good understanding of library characterization, IP design, static timing analysis, power analysis, and signal integrity analysis flows.

Minimum Education Requirement

1.Required : MS, EE, CS, Math or Physics

2.Preferred Education / Preferred Experience: Ph.D. , EE, CS, Math or Physics

If you have interest,PLS send your CV to zhangyl@cadence.com