跪求ius920的connectrule

lizhaohong520@

大家好，我在做AMS仿真··我用的是IC614···但是导入connectlib这个库，但是这个库的cel只有一个readme。是否我IUS不完整？IC614库结构是OA的，我看过connectlib这个里面的文件了，只有vams这类文件。请高手帮帮忙！！！谢谢！！！！

lizhaohong520@

回复 1# lizhaohong520@


    各位兄弟··目前我叫别人发了一个connectlib来，但是跑aMS仿真出现了下面这个错误！
下面图形，我这个rules显示了··但是还是有问题··请问那位大哥来指导一下！！！

lizhaohong520@

回复 1# lizhaohong520@


    我继续跑仿真··在log中看到这段话··
Specified file '/apps/Cadence/ius/IUS09.20.007L1P1/tools.lnx86/affirma_ams/etc/connect_lib/connectLib/ConnRules_3V_basic/connect/verilog.vams' does not exist for the connect rules 'ConnRules_3V_full_fast'.
WARNING (84) : Specified file '/apps/Cadence/ius/IUS09.20.007L1P1/tools.lnx86/affirma_ams/etc/connect_lib/connectLib/L2E_2/module/verilog.vams' does not exist for the connect rules 'L2E_2'.
WARNING (84) : Specified file '/apps/Cadence/ius/IUS09.20.007L1P1/tools.lnx86/affirma_ams/etc/connect_lib/connectLib/E2L_2/module/verilog.vams' does not exist for the connect rules 'E2L_2'.
WARNING (84) : Specified file '/apps/Cadence/ius/IUS09.20.007L1P1/tools.lnx86/affirma_ams/etc/connect_lib/connectLib/Bidir_2/module/verilog.vams' does not exist for the connect rules 'Bidir_2'.
WARNING (84) : Specified file '/apps/Cadence/ius/IUS09.20.007L1P1/tools.lnx86/affirma_ams/etc/connect_lib/connectLib/E2R/module/verilog.vams' does not exist for the connect rules 'E2R'.
WARNING (84) : Specified file '/apps/Cadence/ius/IUS09.20.007L1P1/tools.lnx86/affirma_ams/etc/connect_lib/connectLib/R2E_2/module/verilog.vams' does not exist for the connect rules 'R2E_2'.
WARNING (84) : Specified file '/apps/Cadence/ius/IUS09.20.007L1P1/tools.lnx86/affirma_ams/etc/connect_lib/connectLib/ER_bidir/module/verilog.vams' does not exist for the connect rules 'ER_bidir'.
WARNING (84) : Specified file '/apps/Cadence/ius/IUS09.20.007L1P1/tools.lnx86/affirma_ams/etc/connect_lib/connectLib/L2E_2_CPF/module/verilog.vams' does not exist for the connect rules 'L2E_2_CPF'.
WARNING (84) : Specified file '/apps/Cadence/ius/IUS09.20.007L1P1/tools.lnx86/affirma_ams/etc/connect_lib/connectLib/Bidir_2_CPF/module/verilog.vams' does not exist for the connect rules 'Bidir_2_CPF'.
      ...successful.

证明我的connectlib真的不完整！！！！！！！！！！！！

robberxiong

握爪，我也是跑这个connetrule出问题！

lizhaohong520@

回复 4# robberxiong


    那你的connectrule lib呢？我的是没有啊
有给我发一份··就在那个目录下面哦！！！

robberxiong

回复 5# lizhaohong520@


    我现在没有这个库，干脆自己写了一个connet模块。

lizhaohong520@

回复 6# robberxiong


    高手·····写到我给我邮箱你啊··兄弟··先谢了！！！！

robberxiong

还在实验中，如果没有问题，再发给你！

lizhaohong520@

回复 8# robberxiong


    TKS````我邮箱是lizhaohong520@126.com

robberxiong

回复 9# lizhaohong520@


    查了一下，直接写DA开关，然后写一个AD接口转换，在仿真时候直接把connet lib那里去掉就可以了。eetop里面有个资料上面有写关于这个混仿时候处理接口。