有意者，请将简历发至：
Tracey.zheng@lsi.com
如有任何疑问，请发送邮件至Tracey.zheng@lsi.com或拨打电话021-24191709.
也可加我msn: zql975504@hotmail.com
或者微博啊：
http://www.weibo.com/u/1752448637
1.
Debug Engineer(New!!!)
Job Description
Support the development of high speed analog and mix signal products with focus on test automation system development. The successful candidate should have demonstrated proficiency in working with electronic and semiconductor RF and DC test equipment, test automation, debug, and run-time optimization problems. The candidate is expected to develop and maintain test program/system, implement program for new test methodology.
Responsibilities
Write LabVIEW and Teststand based automated test programs, support device characterization and in-house production testing
Develop maintain database to support test automation and reports management.
Develop schedules and status reports to track test development progress.
take initiative and work independently and without direct daily supervision to complete assigned tasks to defined work schedules
Requirements
BS or MSEE in electrical engineering, Computer science, or related areas.
Demonstrate proficiency in LabVIEW and TestStand programming. Familiarity with Diadem, C#, VB, Java is a plus.
Rich experience of database development and management, data structure and data exchange method design/maintenance. Familiar with Microsoft SQL server or Oracle, and the applications of them.
Hands-on experience on design and development of software control systems for automated test equipment.
Excellent knowledge of general lab equipment and basic measurement techniques. Hands-on experience with oscilloscopes, Power supplies, Network Analyzers, DMMs, etc.
Understands the protocols of common interfaces and busses such as RS232, GPIB, SPI, Ethernet, USB
Good knowledge of server operations, maintenance and monitoring, database backup/restore
Self-motivated, enjoy problem solving and finding creative solutions to challenging situations
logic thinking, high responsible, cooperative, professional attitude and willing to share knowledge/findings with team
2.
Serdes Analog/Mixed-signal Design Engineer (New!!!)
Job Description
- Design and simulate mixed-signal circuitry for high-speed transceiver cores or products
- Create design documents based on the mixed-signal design flow
- Supervise physical layouts of analog circuits
- Work with test engineers to validate designs in silicon
Requirements/Qualifications (Education)
- BSEE/MSEE with more than 2 years of direct experiences in design of mixed-signal circuits, such as high-speed transceivers, amplifiers, phase-locked loops, and digital-to-analog converters. Knowledge in high-speed Serdes is a plus
3.
Serdes
ASIC Design Engineer
(New!!!)
Job Description
- Looking for a candidate who is familiar with digital IC design methodologies, understands all stages of ASIC design flows, and is experienced with state-of-the-art design tools. The candidate has solid knowledge of timing closure and synthesis flow and is experienced in logic design and verification.
- Minimum requirements:* Knowledge of HDL and experience in behavioral and RTL coding, Verilog preferred
- Knowledge of logic synthesis and timing analysis.* DSP and communications background is a plus
Requirements/Qualifications (Education)
- B.S. required, MS/Ph.D. a plus. At least 3 years of experience.
4.
Read Channel Verification Engineer
JOB DESCRIPTION:
As a member of the Read Channel team, candidate must be willing to work as an extended
member of the design team. Duties will include functional verification of Storage read
channel mixed-signal IP. Candidate will be expected to contribute to design and development
of System Verilog based verification environment and will be responsible for verification
closure of block/chip/system level functions for mixed signal based IP. Experience with
System Verilog and functional coverage methodologies are required. Must be willing to
follow a disciplined verification methodology and to work closely with a multi-location,
international design team. Excellent teamwork and communication skills are required.
PREFERRED EXPERIENCE:
BSEE with 3-5+ years of design and/or verification experience required, MSEE preferred.
Required knowledge and skills:
- Expertise in System Verilog required
- Good understanding of Digital Signal Processing
- Good understanding of Analog and Digital Circuits
- Very good analytical/debugging skill
- Good verbal and written communication skills
Desirable skills:
- Knowledge of Verilog-AMS, Perl
- Knowledge of verification methodologies including functional coverage and constrained
random testing
- Knowledge of VLSI design flows & DFT
- Familiarity of high level programming language
- Experience working with globally distributed team
5.
Digital Design Engineer-Shanghai
Job Responsibilities
Working with an Architecture/Algorithm Development Team to finalize system architecture
for optimal implementation of digital signal processing algorithms, including architectural
definition and tradeoffs, die size, power estimation.
Skill required:
Digital logic design, verilog coding, logic synthesis, both RTL and gate level verification,
formal verification and static timing analysis. Unix shell, Perl scripting, C/RTL co-simulation.
Sound theory background of communication and Digital signal processing.
6.
ASIC Customer Engineer-DFT
Job Description
- LSI Corporation offers an excellent opportunity to contribute to a team environment and to grow personal career path. You will be working with internal and external customers to develop state of the art IC solutions utilizing LSI's leading edge CMOS cell-based ASIC technologies. You will have responsibility for ASIC designs through all of the key development and implementation phases including RTL analysis, synthesis, design optimization, timing verification, simulation, test insertion, physical design, vector generation, and post-prototype test support. Candidates will have opportunity to work on the latest 40nm/28nm designs.
Requirements/Qualifications (Education)
Education: BS/MS Electrical, Computer Engineering or Equivalent
- DFT: The ideal candidate should be strong in all DFT (Design for Test) for all aspects. This would include
- scan/TDF, TestKompress, MEMBIST/BISR, JTAG and etc. Having STA skills is a plus for all aspects of test. Responsible for support / debug of customer designs after delivery of prototypes
7.
SerDes Application Engineer
DESCRIPTION OF DUTIES
Applications engineer for custom silicon integrated circuits with SerDes interfaces located in
Shanghai, China. Work as part of a team of highly skilled applications engineers located in
Milpitas, CA, and Allentown, PA, along with local field applications and sales engineers. The
successful candidate will work directly with the customer supporting custom silicon IC’s with
responsibilities including product definition, SerDes integration, channel definition and analysis,
system bring up, and production ramp. This individual must be highly motivated and capable of
working independently or as part of a team. Expertise in high speed serial interfaces and PCB
signal integrity is required.
PREFERRED EXPERIENCE:
- Oral and written communication skills in both Chinese and English
- Microsoft Office Tools including Excel, Powerpoint, and Word
- Detailed understanding of serial communications
- Knowledge of serial communications standards including XAUI, SRIO, OIF-CEI,
IEEE802.3ap, Fibre Channel, SFF-8431
- Knowledge of semiconductor technology
- Desired: Use of state of the art test equipment including sampling scopes, BERTs, real
time scopes. High speed PCB layout design techniques and modeling
Education/Certifications
BSEE plus 8 years relevant experience in semiconductors with serial interfaces or
MSEE plus 5 years relevant experience in semiconductors with serial interfaces
8.
Field Coreware Engineer
JOB DESCRIPTION:
This position will support DDR/DDR2/DDR3, QDR, RLDRAM, and/or NAND Flash memory
Interface IP applications and their future versions. Customer interface. Generate application
notes. Work with development teams to provide customer technical support. Memory Interface
Phy IP customization.
PREFERRED EXPERIENCE:
- Verilog RTL coding, logic simulation, Synsopsys Design Compiler, Synopsys PrimeTime
STA, Good communication skill, Technical writing (Tech Manual, App Notes, Datasheet)
- BSEE or equivalent, and 3 years logic design industrial experiences, preferrable in
DDR/DDR2/DDR3 SDRAM, QDR SRAM, RLDRAM, and/or NAND Flash memory
Interface
9.
Software Quality Assurance(SQA)
Education and Experience Requirements
BS in Electrical Engineering, Computer Science, or Computer Engineering is required with 6+ years of firmware development.
M.S. preferred with 4+ years in software / hardware validation
Knowledge, Skills, and Abilities
-
Quick learner with high level of self-motivation and dedication, with ability to deliver high quality products on time
-
Meticulous, methodical, uncompromising, and creative in testing
-
Experience in software debugging, problem creation and trapping
-
Experience in devising testing / validation methodology is strong plus
-
Communicate effectively in a team, able to multitask effectively in fast-paced environment.
-
Understanding of NAND Flash concepts, knowledge of Flash management techniques, including wear leveling, garbage collection (strong plus).
-
Knowledge and hands-on experience with storage protocols is preferred (SAS / SATA)
10.
Firmware Engineer
Education and Experience Requirements
BS in Electrical Engineering, Computer Science, or Computer Engineering is required with 6+ years of firmware development.
M.S. preferred with 4+ years in firmware development.
Knowledge, Skills, and Abilities
-
Must demonstrate expertise in design and implementation of event-driven, real time firmware solutions using C/C++ programming
-
Must be able to work with ASIC and software engineers in a collaborative environment
-
Quick learner with high level of self-motivation and dedication, with ability to deliver high quality products on time
-
Must have an excellent computer science background and demonstrated strength in designing efficient embedded firmware for storage or networking products
-
Firmware/System debug skills utilizing debugger, protocol analyzer is required
-
Good understanding of RTOS concepts including task switching, deadlocks, and resource management issues is required
-
High level of skill in problem recreation, trapping and resolution, possess good written and verbal communication skills.
-
Communicate effectively in a team, able to multitask effectively in fast-paced environment.
-
Understanding of NAND Flash concepts, knowledge of Flash management techniques, including wear leveling, garbage collection (optional but strong plus).
-
Knowledge and hands-on experience with storage protocols is preferred (SAS / SATA)
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发表于 2012-4-6 11:21:21
