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A CMOS Interface IC for CCD Imagers
K. Y. Kim and A. A. Abidi
Integrated Circuits & Systems Laboratory
University of California
Los Angeles, CA 90024-1594
K. Y. Kim and A. A. Abidi
A CMOS Interface IC for CCD Imagers
ABSTRACT
A 2-µm CMOS IC interfaces directly to the output
of a CCD, level shifts the signal, amplifies it by a 4-
bit programmable gain of up to 20 dB, and corrects
the offset per pixel with a 3-bit word. A non-reset
video output is obtained with an internal timeinterleaved
architecture. THD of -50 dB is obtained
at 15 MHz clock rates and ±3.3 V full scale outputs.
The 2.8 × 3.7 sq mm circuit dissipates 140
mW from a 5V supply. |
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