calibre lvs 报错

DruculaC · 发表于 2012-3-13 16:49:49

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本帖最后由 DruculaC 于 2012-3-13 16:52 编辑

报错如下:  像是加的port没有连接到metal1
Extraction Errors and Warnings for cell "inv.calibre.db"
---------------------------------------------------------

WARNING:  Unattached label:
      Name  "VDD!"  at location  (1.08,1.735)  on layer  141

WARNING:  Unattached label:
      Name  "OUT"  at location  (4.67,6.53)  on layer  141

WARNING:  Unattached label:
      Name  "IN"  at location  (5.475,9.15)  on layer  141

WARNING:  Unattached label:
      Name  "GND!"  at location  (8.495,9.73)  on layer  141

WARNING:  Unattached port pads; port ignored:
      Port name:  VDD!  on layer  141  at location  (1.08,1.735)

WARNING:  Unattached port pads; port ignored:
      Port name:  OUT  on layer  141  at location  (4.67,6.53)

WARNING:  Unattached port pads; port ignored:
      Port name:  IN  on layer  141  at location  (5.475,9.15)

WARNING:  Unattached port pads; port ignored:
      Port name:  GND!  on layer  141  at location  (8.495,9.73)

WARNING: Invalid PATHCHK request "GROUND && ! POWER": no POWER nets present, operation aborted.

WARNING: Invalid PATHCHK request "POWER && ! GROUND": no POWER nets present, operation aborted.

WARNING: Invalid PATHCHK request "! POWER && ! GROUND": no POWER nets present, operation aborted.

WARNING: Invalid PATHCHK request "! LABELED": no LABELED nets present, operation aborted.

               ##################################################
               ##                                           ##
               ##       C A L I B R E S Y S T E M       ##
               ##                                           ##
               ##          L V S R E P O R T             ##
               ##                                           ##
               ##################################################

REPORT FILE NAME:       inv.lvs.report
LAYOUT NAME:             inv.calibre.db
SOURCE NAME:             /home/tsm0001/verify/out_richard/inv.src.net ('inv')
RULE FILE:             /home/tsm0001/verify/out_richard/_SmicSP2T_cal035_epm_realhv3.3V_p2mtx.lvs_
LVS MODE:                Mask
RULE FILE NAME:          /home/tsm0001/verify/out_richard/_SmicSP2T_cal035_epm_realhv3.3V_p2mtx.lvs_
CREATION TIME:          Tue Mar 13 16:45:46 2012
CURRENT DIRECTORY:       /home/tsm0001/verify/out_richard
USER NAME:             tsm0001
CALIBRE VERSION:       v2011.2_34.26 Wed Jul 6 05:20:09 PDT 2011

**************************************************************************************************************
                           OVERALL COMPARISON RESULTS
**************************************************************************************************************

               # #       #####################
               # #       #                #
                  #          #    INCORRECT    #
               # #       #                #
               # #       #####################

  Error: Different numbers of nets (see below).
  Error: Connectivity errors.

--------------------------------------------------------------------------------------------------------------

INITIAL NUMBERS OF OBJECTS
--------------------------

            Layout Source       Component Type
            ------ ------       --------------
Ports:             4       4

Nets:             4       4

Instances:       1       1       MN (4 pins)
                  1       1       MP (4 pins)
            ------ ------
Total Inst:       2       2

NUMBERS OF OBJECTS AFTER TRANSFORMATION
---------------------------------------

            Layout Source       Component Type
            ------ ------       --------------
Ports:             4       4

Nets:             8       4 *

Instances:       1       1       MN (4 pins)
                  1       1       MP (4 pins)
            ------ ------
Total Inst:       2       2

   * = Number of objects in layout different from number in source.

lvs文件中关于port的定义如下：
TEXT LAYER 141 ATTACH 141 metal1
PORT LAYER TEXT 141
TEXT LAYER 61 ATTACH 61 metal1
PORT LAYER TEXT 61
#IFDEF TOPMETAL 3
TEXT LAYER 143 ATTACH 143 metal3
PORT LAYER TEXT 143
TEXT LAYER 363 ATTACH 363 metal3
PORT LAYER TEXT 363
TEXT LAYER 142 ATTACH 142 metal2
PORT LAYER TEXT 142
TEXT LAYER 62 ATTACH 62 metal2
PORT LAYER TEXT 62
#ENDIF
#IFDEF TOPMETAL 2
TEXT LAYER 142 ATTACH 142 metal2
PORT LAYER TEXT 142
TEXT LAYER 62 ATTACH 62 metal2
PORT LAYER TEXT 62
#ENDIF

DruculaC · 发表于 2012-3-13 16:53:25

在transformation后，把pin和metal分开了，这有什么设置的地方吗？

shack · 发表于 2012-3-13 19:48:49

端口定义是没有问题的，检查下metal1定义与版图是否一致

fl10197 · 发表于 2012-3-14 14:58:28

Unattached label应该你加的port layer不对，或者十字点没放在金属上

1127208631 · 发表于 2012-3-14 18:17:44

回复 4# fl10197

我想请教一个问题，我做LVS时也出现了类似的warning,但是我去相应cell "A"的layout中查看过，label确实在那个位置，并且已经打在了相应的meatl层上。
我单个run cell "A"的lvs时并没有出现这样的warning.对于这样的情况，不知道为什么会这样？
Thanks