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A 2.6-GHz/5.2-GHz Frequency Synthesizer in 0.4um CMOS Technology 2000
by
Christopher Lam and Behzad Razavi, Member, IEEE
Abstract
This paper describes the design of a CMOS frequency
synthesizer targeting wireless local-area network applications in
the 5-GHz range. Based on an integer- architecture, the synthesizer
produces a 5.2-GHz output as well as the quadrature phases
of a 2.6-GHz carrier. Fabricated in a 0.4- m digital CMOS technology,
the circuit provides a channel spacing of 23.5 MHz at 5.2
GHz while exhibiting a phase noise of 115 dBc/Hz at 2.6 GHz and
100 dBc/Hz at 5.2 GHz (both at 10-MHz offset). The reference
sidebands are at 53 dBc at 2.6 GHz, and the power dissipation
from a 2.6-V supply is 47 mW.
Index Terms—Frequency dividers, oscillators, phase-locked
loops, RF circuits, synthesizers, wireless transceivers.
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 5, MAY 2000 |
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发表于 2006-11-23 09:07:24
