最近发表的一篇LDO的论文

mingyulane

3QQQQQQQQQ

xiedaiyi5

谢谢谢谢

semico_ljj

Abstract: This paper presents a 200 mA low-dropout (LDO) linear regulator using two modified techniques for
frequency compensation. One technique is that the error amplifier uses a common source stage with variable load,
which is controlled by the output current, is served as the second stage for a stable frequency response. The other
technique is that the LDO uses a pole-zero tracking compensation technique at the error amplifier to achieve a
good frequency response. The proposed circuit was fabricated and tested in HJTC 0.18 m CMOS technology.
The designed LDO linear regulator works under the input voltage of 2.8–5 V and provides up to 200 mA load
current for an output voltage of 1.8 V. The total error of the output voltage due to line and load variation is less than
0.015%. The LDO die area is 630  550 m2 and the quiescent current is 130 A.

semico_ljj

Year         2007Œ5�         2008Œ7�         2009Œ11�         2011Œ6�         This work          
Technology (m)         0.35         0.35         0.18         0.35         0.18          
Chip area (mm2/         0.264         0.409         —         0.463         0.346          
Input voltage (V)         2–5.5         2–3.6         3–5.5         2.2–3.3         2.8–5          
Output voltage (V)         1.8         1.8         1.8         2         1.8          
Load regulation (mV/mA)         0.17         0.7         0.448         0.3         0.15          
Settling (&#22;s)         —         5 (0–100 mA)         2 (1–100 mA)         8         < 50 (1–200 mA)          
Maximum output current (mA)         200         150         125         200         200          
Quiescent current (&#22;A)         340         27         150         60         130

iyahsue

gooooooooooooooooooooood

taoxiaoyanyong

谢谢啦！