|
马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。
您需要 登录 才可以下载或查看,没有账号?注册
x
esponsibilities:
- Responsible for development of ATE test patterns for new products to enable Sort and Class testing
o Determine methods and means for structural testing of new products
o Develop and communicate a test plan and schedule
o Implement and verify manufacturing patterns for new products
- Responsible for ensuring device testability and completing coverage analysis
o Identify potential testability issues during the product planning phase on a new product and resolve
with design before implementation in silicon
o Analyze structural coverage metrics to reach product coverage objectives
o Document device or software issues that affect device testability
- Responsible for automation of test pattern generation and coverage metrics
o Develop tools and methods for device testing
o Contribute to the development of structural coverage metrics
o Write test methodology documentation intended for company wide distribution
- Support internal and external customers on an as needed basis for products which have been released to
production, but have either coverage or yield issues
Qualifications:
 BS or MS level Electrical Engineer
 Work experience on DFT design and test methodology
 Be familiar with BIST, Boundary Scan test
 Proficient in HDL coding
 0 - 5+ years Test Development, Design Verification, or related Semiconductor experience in design
house
 Strong written and verbal communication skills including English
 High level of PC skills with knowledge of MS Office Suite
公司是从事世界上最先进的超大规模可编程逻辑器件及相应的EDA软件系统的研究、设计、开发、生产的专业公司之一,是在系统可编程技术(In System Programmability,简称ISP)及器件的发明者和供应商,是世界上三大可编程逻辑器件供应商之一。
有意者请联系sundy
Tel:
021-60875595
MSN: sy5985@hotmail.com
E-mail:
sundy.song@bestgearconsulting.com |
|