"CMOS design of PLL" 2011 博士论文 Northeastern University

zhengqh123 · 发表于 2011-12-1 22:12:02

希望适合新手入门。

yuqiumax · 发表于 2011-12-3 08:32:26

回复 1# zqsus

这么多垃圾回复。

January 01, 2011
A low power CMOS design of an all digital phase
locked loop
Jun Zhao
Northeastern University
This work is available open access, hosted by Northeastern University.

gyl42 · 发表于 2011-12-3 11:43:25

谢谢分享!!!

nareshreddy · 发表于 2011-12-9 18:36:48

gfgfgfhfhgfhf

w15937865733 · 发表于 2012-1-5 12:49:00

XUE XI XUE XI

Sradio · 发表于 2012-1-13 03:40:13

这篇写的好阿！

nareshreddy · 发表于 2012-6-3 19:03:03

vxcvxvvxcvcxvxc

xjqxjq28007 · 发表于 2012-6-20 15:24:50

回复 1# zqsus

好东西，谢谢楼主分享

00ab · 发表于 2012-7-18 20:54:08

看看啦

nareshreddy · 发表于 2012-9-13 17:57:31

FGGDFGDFGDGDGDFGDG

[资料] "CMOS design of PLL" 2011 博士论文 Northeastern University

站长推荐 /1