DDR verilog RTL

hqhjj · 发表于 2011-10-23 23:10:52

马上注册，结交更多好友，享用更多功能，让你轻松玩转社区。

您需要登录才可以下载或查看，没有账号？注册

x

File/Directory Description
=============================================================================
\doc DDR SDRAM reference design documentation
\model Contains the verilog SDRAM model
\route Contains the Quartus 2000.05 project files a routed controller design
\simulation Contains the verilog testbench, modelsim project file, and library
\source Contains the verilog source files for the DDR SDRAM reference design
\synthesis\synplicity Contains all synplicity project files associated with synthesizing the reference design

DDR.rar (734.68 KB, 下载次数: 278 )

billwaston · 发表于 2011-10-24 00:17:15

谢谢分享

qingxuan1 · 发表于 2011-10-24 08:29:33

谢谢分享

cadance · 发表于 2011-10-24 13:00:41

thanks for sharing

gubels · 发表于 2013-7-17 02:11:30

回复 1# hqhjj

omariogozumas

zhoususheng · 发表于 2013-11-30 22:07:18

haorenhaoduoa

chrisdy · 发表于 2017-4-12 04:10:36

谢谢分享

flaming4u · 发表于 2017-4-15 21:41:32

回复 1# hqhjj

支持一下啊

pradeepmadhava1 · 发表于 2017-4-23 20:01:30

Thanks very much

temp15555 · 发表于 2017-4-23 22:45:49

谢谢分享

[资料] DDR verilog RTL

马上注册，结交更多好友，享用更多功能，让你轻松玩转社区。

相关帖子

站长推荐 /1