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求2篇IEEE论文,谢谢
• Driver design for DDR4 memory subsystems
Nam Pham; Dreps, D.; Mandrekar, R.; Nanju Na;
Electrical Performance of Electronic Packaging and Systems (EPEPS), 2010 IEEE 19th Conference on
Digital Object Identifier: 10.1109/EPEPS.2010.5642788
Publication Year: 2010 , Page(s): 297 - 300
• A 1.5-V 3.2 Gb/s/pin Graphic DDR4 SDRAM With Dual-Clock System, Four-Phase Input Strobing, and Low-Jitter Fully Analog DLL
Ki-Won Lee; Joo-Hwan Cho; Byoung-Jin Choi; Geun-Il Lee; Ho-Don Jung; Woo-Young Lee; Ki-Chon Park; Yong-Suk Joo; Jae-Hoon Cha; Young-Jung Choi; Moran, P.B.; Jin-Hong Ahn;
Solid-State Circuits, IEEE Journal |
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