1. Analog Mixed-Signal Design Manager
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
Manage and lead developments of analog and mixed-signal design for high-speed Serdes
core and products. Define specification and implementation of SerDes core based on the
industry standard or requirements from customers. Interface with system, digital design,
physical layout, process and modeling team on development of sophisticated SerDes cores
and products. Create design documents based on the mixed-signal design flow. Provide
technical supports to customers and internal marketing team related to product applications.
Participate in silicon validation of SerDes cores.
PREFERRED EXPERIENCE:
MSEE/PhD with at least 8 years of direct experiences in analog designs for high speed
SerDes, such as decision feedback equalizer in analog and digital domain, ultra-wide band
amplifier, low-jitter and wide-tuning range frequency synthesizer, clock and data recovery
circuit, and high speed continuous filter and transmitter. Tracking records in successfully
leading the state-of-art SerDes developments. Excellent personal and managerial skills, and
knowledge industry standards, like OIF CEI and 802.3AP, Fibre Channel are required.
2. ASIC Design Engineer
Job Description
- LSI Corporation offers an excellent opportunity to contribute to a team environment and to grow personal career path. You will be working with internal and external customers to develop state of the art IC solutions utilizing LSI's leading edge CMOS cell-based ASIC technologies. You will have responsibility for ASIC designs through all of the key development and implementation phases including RTL analysis, synthesis, design optimization, timing verification, simulation, test insertion, physical design, vector generation, and post-prototype test support. Candidates will have opportunity to work on the latest 40nm/28nm designs.
Detail design tasks include
- Presales support (die size support, memory generation, addressing customer questions and concerns.)
- RTL analysis & synthesis
- Top level and block level physical design Implementation (bonding, floor planning, power structure insertion, place and route, timing closure)
- Test structure insertion/silicon testing debug
- Formal verification
- Static timing analysis
- Cross talk analysis
- Power verification
- Physical verification
- Overtime, candidates are expected to develop the most of above skills. Candidates who have the desire to seek the in-depth and broad technical challenge should apply.
Requirements/Qualifications (Education)
Education: BS/MS Electrical, Computer Engineering or Equivalent
- 2+ years experience in ASIC design and implementation. Familiar with all aspects of ASIC design implementation flow and specializing in physical design or DFT implementation. The ideal candidate should have successfully completed at least one mid-size ASIC or ASSP tapeout.
- Experience with Synopsys Astro or ICC is a plus. Other physical design tool experience will also be considered. Scripting skill is a strong plus.
- Experience in debugging prototypes considered a strong plus. Knowledge and hands on use of test insertion / vector generation / verification a plus. Some experience with Signal integrity a bonus.
- Experience in working with customers is desired. Must possess excellent communication skills and strong self-motivation. Be able to effectively communicate with other members of the design team, supporting organizations, and management. This position requires frequent interface with LSI customers
- Candidates have ONE OR MORE good skill sets of the following areas are highly encouraged to apply:
-
RTL Analysis/Synthesis/STA:
The ideal candidate should have strong skills for the front-end of design
- implementation which includes RTL Analysis, Synthesis Strategies, and STA setup for complex ASIC
- environments. This would include strategies for power management.
- OR
-
Physical Design Implementation:
The ideal candidate should be strong in the Physical Design (at least at block level) which includes floor planning, design closure, & STA. Having strong DRC & LVS skills are a plus. Strong
- Synopsys Astro/ICC experience a plus. Having Mentor Calibre skills a plus.
- OR
-
Physical Verification:
The ideal candidate should have in-depth understanding of transistor level IC fabrication process, familiar with major foundries(TSMC or SMIC) runsets and verification flow, custom layout experience is a plus, successfully done LVS/DRC/ERC/Antenna check for multiple tapeouts is a strong plus. Understanding of DFM is a plus. Calibre experience is a plus.
- OR
-
DFT:
The ideal candidate should be strong in all DFT (Design for Test) for all aspects. This would include
- scan/TDF, TestKompress, MEMBIST/BISR, JTAG and etc. Having STA skills is a plus for all aspects of test. Responsible for support / debug of customer designs after delivery of prototypes
3. Design Validation Engineer
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
- This position is part of the LSI’s world-leading head-to-host recording system design validation team, and focus on high speed pre-amplifier validation and debug.
- Set up bench test equipment and perform characterization measurements on high speed(>4GHz) mixed signal IC's, paying careful attention to measurement accuracy and repeatability and test condition coverage
- Design and layout evaluation PCBs, paying careful attention to high speed signals and board component parasitic
- Develop automated scripts and program test equipment to automate data collection and report generation. Where automated measurements are not practical, manual data collection is to be performed
- Work with design and other characterization teams in design verification and characterization and errata corrective action, as well as work with program management, test and product engineering to insure timely delivery of fully verified silicon
- Support bench application engineers with in-depth customer specific measurements and failure analysis
- Organize bench data into technical reports for reference and presentation. Presentation of data to both internal and external customers
- Manage local subcontractors that perform flip chip and board assembly. Work with program management, design, test and product engineering as part of a product support team to insure timely delivery of fully validated silicon.
PREFERRED EXPERIENCE:
- Investigative and analytical mindset, with a strong interest in electronics and technical work
- A thorough knowledge of electronic circuits and systems with practical experience in analog and digital electronic circuit design and debug
- Experience or background with one of the following areas is preferred
a) Experiences in RF, high-speed connector(SATA, DDR etc), gesture recognition or storage system(HDD, Flash etc) measurement
b) Experiences in Cadence Allegro HDL(Concept) PCB development. Allegro layout experience is a plus
c) Developing the automation programming: VBS, Labview & TestStand. IVI driver coding experience is a strong plus
d) Complete the FPGA design with 200MHz+ data paths before
- Expertise in applied magnetism and recording a strong plus
- Good communication skills, especially in technical writing and reporting
Education/Certifications
Required Degree: BS Preferred Degree: MS Preferred Major: Electrical Engineering or related discipline.
4. Lead Signal Integrity & Application Engineer
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
This position will define SI requirements on advanced memory interface solutions including
DDR3/4, RLDRAM III and ONFI 2.2 NAND Flash interfaces. Work in a co-design environment
by providing specifications to IO and package designers. Develop IP implementation
guidelines based on feasibility analysis and support internal design teams. Provide complete
application support to customers by providing SI Kits, Timing Budgets and System Design
Application Notes.
PREFERRED EXPERIENCE:
- Education Requirements: MSEE with 5 or BSEE with 7 years experience in high speed
interface design and signal integrity.
- Hands on experience with high speed interfaces (DDR1/2/3, RLDAM II, QDR SRAM,
Flash, USB) implementation and hardware system experience is a must..
- Experience in Serial Interface architecture, protocols, Backplane design/analysis is
preferable.
- System Signal Integrity analysis experience with HSPICE is must and familiarity with tools
such as Agilent ADS, Sigrity Power-SI, Ansoft HFSS, Apache tools.
- Knowledge of IBIS modeling, board & package model extraction, via modeling.
- Proficiency in Electromagnetic, Transmission-line & S-parameters theory and modeling.
- Understanding of signal integrity analysis parameters and evaluate trade-offs between
design parameters to determine an optimum solution space.
- Simulating and analyzing Power distribution network.
- Firmware knowledge and programming skills in Excel, PERL, Verilog and Matlab is
preferred.
- Experience using lab measurement tools such as oscilloscopes, TDR, VNA and software
tools such as Labview, PLTS.
- Strong written and oral communication in Chinese and English with customer service skills.
5. Mixed-Signal read-channel SoC Silicon Validation Engineer
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
We are looking for engineers who have experience working in a lab characterizing high-speed
mixed signal (analog and digital) read channel/SoC.
PREFERRED EXPERIENCE:
- The candidate must know how to use advanced waveform generators, oscilloscopes,
network analyzers and logic analyzers.
- The engineer must also be expert in data analysis techniques and in various scripting
languages (Perl, TCL, and Python). Experience in lab automation (such as through GPIB
scripting) is also desirable.
- A moderate level understanding of complex analog and digital circuits is required. It is not
required, however preferred if candidates have knowledge on and/or experience in read
channel/SoC.
- Excellent written and good English communication skills are required.
- Candidates should hold BSEE or MSEE (preferred) degrees; and are expected to be
highly motivated and resourceful in troubleshooting and problem solving.
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发表于 2011-9-20 22:34:43
楼主
楼上还有顶的 ??