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【招聘】全球著名美资IC公司LSI上海研发中心2011年8月热招职位!!!
LSI上海研发中心正在扩张,目前有很多职业发展机会,欢迎有志之士加入!有意者,请将简历发至:Tracey.zheng@lsi.com 如有任何疑问,请发送邮件至Tracey.zheng@lsi.com或拨打电话021-24191709. 也可加我msn: zql975504@hotmail.com LSI上海研发中心位于徐汇区中山南二路徐汇苑大厦(8万人体育场对面) 1.
Lead Signal Integrity & Application Engineer Job Description This position will define SI requirements on advanced memory interface solutions including DDR3/4, RLDRAM III and ONFI 2.2 NAND Flash interfaces. Work in a co-design environment by providing specifications to IO and package designers. Develop IP implementation guidelines based on feasibility analysis and support internal design teams. Provide complete application support to customers by providing SI Kits, Timing Budgets and System Design Application Notes.
Requirements/ Education Requirements: MSEE with 5 or BSEE with 7 years experience in high speed interface design and signal integrity.
• Hands on experience with high speed interfaces (DDR1/2/3, RLDAM II, QDR SRAM, Flash, USB) implementation and hardware system experience is a must..
• Experience in Serial Interface architecture, protocols, Backplane design/analysis is preferable.
• System Signal Integrity analysis experience with HSPICE is must and familiarity with tools such as Agilent ADS, Sigrity Power-SI, Ansoft HFSS, Apache tools.
• Knowledge of IBIS modeling, board & package model extraction, via modeling.
• Proficiency in Electromagnetic, Transmission-line & S-parameters theory and modeling.
• Understanding of signal integrity analysis parameters and evaluate trade-offs between design parameters to determine a optimum solution space.
• Simulating and analyzing Power distribution network.
• Firmware knowledge and programming skills in Excel, PERL, Verilog and Matlab is preferred.
• Experience using lab measurement tools such as oscilloscopes, TDR, VNA and software tools such as Labview, PLTS.
• Strong written and oral communication in Chinese and English with customer service skills 2.
Program Manager JOB DESCRIPTION: Scope of programs: - International Programs with contributors from several organizations and/or Business Units - Programs with high business impact, above $20Mio total over product lifetime - Programs with high development cost and effort, above 5 man years - Programs with concurrent engineering of customer product and IP customization Project Definition: - Ensure that Goals, Objectives & Scope for the Program is defined, understood and agreed to - Work with engineering and management to form the project team. - Develop a Project Plan with clear ownership and deliverables milestones together with LSI and Customer teams - Work with engineering to calculate and forecast the effort and investment for successful project execution - Drive concurrent Risk Management as integral part of the project planning and execution Project Execution: - Call regular project review meetings, internal and with the customer. Coordinate and align the customer execution with internal LSI organizations and deliverables. - Ensure effective communication between all parties involved. Provide regular project reports (to the customer and internal) - Continuously track/maintain and measure project schedule progress against plan - Perform continuous Risk Management and elevate critical issues and risks. - Manage the Change Management Process (with the customer and internal to LSI) - Manage the Action Management Process - Facilitate Project Lessons Learned (internal and with the customer) PREFERRED EXPERIENCE: - Minimum 5 years experience in the fields of management, sales/marketing and engineering - Good understanding of the ASIC design process & methodology - Detailed knowledge of project management methodology, processes and tools (PMI certification is a plus) - Expert knowledge in Microsoft Project, Excel, and Outlook - Basic knowledge in Microsoft Word and PowerPoint - Engineering degree or equivalent - Ability to adopt and execute a structured working methodology - Fluent verbal and writing language skills in native language and English - Strong communication skills - Excellent interpersonal and leadership 3.
Senior Hardware Validation Engineer Job Description Duties will include working within a Product Development Team to perform IC verification and emulation, and board evaluation. As a member of a design team, candidate will be responsible for managing the design from concept to product launch. Required:
- Minimum of 3-5 years Digital IC validation or emulation experience in a product development environment
- Proven Digital IC Design / Verification skills
- Must be familiar with CAD tools, and Network teste quipment, and Oscilloscope
- Must be willing to follow a structured emulation approach for reuse and provide thorough emulation documentation
- Strong written and verbal communication skills Desired:
- Past experience in IC emulation or validation
- verification with advanced verification methodology
- Ethernet, USB experience, PCI-E, TCP/IP, ATM
4.
Senior Custom Design Engineer
Job Description - Candidates for this position should have experience in the design and design management of large, high-speed, mixed signal ICs. - The designs must have contained a variety of both hard and soft-macro IP blocks. - The candidate should be an expert in all parts of the full-custom digital IC design flow from DSP algorithm or datapath architecture optimization for digital full custom design, to transistor level schematics design and optimization, SPICE simulation, DFT and test insertion, floorplanning, layout, circuit characterization, timing closure, signal integrity, power analysis and verification. Requirements/Qualifications (Education) - The candidate should have 3+ years of design experience. Full custom digital design experience on DSP algorithm based datapath with CMOS, Domino Logic, and/or CPL, is preferred. MSEE or PhD required.
5.
Preamp Verification Engineer
Job Description LSI Corporation is known worldwide as a storage market leader. Our silicon-to-systems solutions empower disk drives with the intelligence, flexibility, speed and reliability needed for high-capacity storage across every market segment, from portable consumer electronics devices to personal computers to enterprise-class storage systems and networks. LSI's Storage Peripherals Division is seeking an experienced verification design engineer to join the pre-amplifier design team. Preamp design team members define, create, modify and verify high-speed custom integrated circuits for hard disk drive (HDD) and tape recording products using leading edge CMOS and BiCMOS technologies - Work with a Preamp Development team to create verilog testbench components and simulation environment. - Create product test plans, test cases and perform simulation and debug of Storage Preamp mixed-signal devices. - Must be experienced with Verilog and Verilog AMS and knowledgeable with functional coverage methodologies. - Ability to follow a disciplined verification methodology and work closely with a multi-location, international design team. - Excellent teamwork and communication skills are required. Requirements/Qualifications (Education) - Preferred degree in Electrical or Electronic Engineering. - BS required, MS or Ph.D. preferred - The ideal candidate will have 5 years of experience as a member of a Design Verification team - Experience with successful tapeout of SoC products from verification plan to sign-off including verification plan, reusable test bench development, random-constrained test case creation, RTL/Gate level simulation/debug, code/functional coverage analysis and regression - Conversant with Verilog, SystemVerilog, Specman, Perl/Python/Tcl scripts, Makefile and EDA tools - Experience with Assertion or Formal Verification a plus - Strong communication skills (must be proficient in both spoken and written English) - Able to travel internationally (to United States and throughout Asia - Understanding of silicon process technologies (CMOS and Bipolar) and device physics would be a plus. - Conversant with Verilog-AMS/Verilog-A and Analog Behavior Modeling would be a plus - Proven analytical skills (application of math and physics to solve problems)
6.
Sr. Verification Engineer –Shanghai Job Responsibilities Duties will include working with a Verification Team to develop reusable block and system level verification environment using high level verification language to support ASIC development. Review RTL architectural and implementation specifications. Develop test plan, create stimulus drivers, monitors, reference models, scoreboards, protocol checkers to verify function and performance of advanced multiprotocol networking ASICs. Define and develop application tests required to verify ASICs meet functional and performance goals. Define and implement functional coverage plans. Define and implement code coverage plans. Develop testing and regression methodologies for new verification flow. Coordinate test plan implementation and regressions with remote team. Incorporate reusability into all aspects of the verification environment. Develop/maintain/enhance environment tools/scripts/makefiles. LSI Corporation is a leading provider of innovative silicon, systems and software technologies that enable products which seamlessly bring people, information and digital content together. We offer a broad portfolio of capabilities and services including custom and standard product ICs, adapters, systems and software that are trusted by the world's best known brands to power leading solutions in the storage and networking markets. We value the diversity of our people. LSI is an Equal Opportunity Employer. Functional/Industry Knowledge:
Required: - ASIC Design and Verification skills and experience - Knowledge of high level verification languages such as SystemVerilog - Knowledge of data and telecommunication networking - Scripting skills, such as Shell, Perl and TCL - Good written and verbal communication skills Education/Certifications: Required Degree: MS Preferred Major: Electrical Engineering or related discipline
7.
DIV Engineer (CAD) –Shanghai JOB DESCRIPTION: A DIV engineer’s duties include working within a highly motivated design team to support EDA tools and methodology for custom analog/mixed-signal design of high speed analog integrated circuits. - Communicate effectively within a global business environment (must be proficient in both spoken and written English). - Support EDA tools and design & verification methodology development for custom analog/mixed-signal design of HDD Read Channel ICs. - Support of tools and methodology focused on front-end design (schematic entry and simulation) - Support of tools and methodology focused on back-end design (cell, block and chip layout and verification). - Work with LSI team members in US and Asia to provide interface between EDA tool vendors, internal and external design kit developers and design team members. - Investigate and support development of new EDA tools and methodologies for improvements in IC Circuit Design and Layout productivity. PREFERRED EXPERIENCE: - Preferred degree in Electrical or Electronic Engineering, Software Engineering - BS required, MS preferred - Minimum of 3 years EDA support or IC design/layout experience - Experience required with design and simulation tools such as Cadence Composer, Spectre, AMS, Ultrasim and Analog Artist - Experience required with layout tools such as Vitruoso XL, Hercules DRC and Assura LVS - Expertise in full custom analog and mixed-signal design and layout, design data management tools and methodologies and parasitic extraction is needed - Familiar with Verilog/VHDL - Familiarity with digital and ASIC design flows, power and electro-migration analysis, and IC manufacturing is desirable - Strong communication skills (must be proficient in both spoken and written English) - Proven analytical skills (application of math and physics to solve problems) 8.
ASIC Customer Engineer-Shanghai Job Description - LSI Corporation offers an excellent opportunity to contribute to a team environment and to grow personal career path. You will be working with internal and external customers to develop state of the art IC solutions utilizing LSI's leading edge CMOS cell-based ASIC technologies. You will have responsibility for ASIC designs through all of the key development and implementation phases including RTL analysis, synthesis, design optimization, timing verification, simulation, test insertion, physical design, vector generation, and post-prototype test support. Candidates will have opportunity to work on the latest 40nm/28nm designs. Requirements/Qualifications (Education) Education: BS/MS Electrical, Computer Engineering or Equivalent - Candidates have ONE OR MORE good skill sets of the following areas are highly encouraged to apply: - RTL Analysis/Synthesis/STA: The ideal candidate should have strong skills for the front-end of design - implementation which includes RTL Analysis, Synthesis Strategies, and STA setup for complex ASIC - environments. This would include strategies for power management. - OR Physical Design Implementation: The ideal candidate should be strong in the Physical Design (at least at block level) which includes floor planning, design closure, & STA. Having strong DRC & LVS skills are a plus. - Synopsys Astro/ICC experience a plus. Having Mentor Calibre skills a plus. - OR - Physical Verification: The ideal candidate should have in-depth understanding of transistor level IC fabrication process, familiar with major foundries(TSMC or SMIC) runsets and verification flow, custom layout experience is a plus, successfully done LVS/DRC/ERC/Antenna check for multiple tapeouts is a strong plus. Understanding of DFM is a plus. Calibre experience is a plus. - OR - DFT: The ideal candidate should be strong in all DFT (Design for Test) for all aspects. This would include
- scan/TDF, TestKompress, MEMBIST/BISR, JTAG and etc. Having STA skills is a plus for all aspects of test. Responsible for support / debug of customer designs after delivery of prototypes
9.
Read Channel Verification Engineer-Shanghai JOB DESCRIPTION: As a member of the Read Channel team, candidate must be willing to work as an extended member of the design team. Duties will include functional verification of Storage read channel mixed-signal IP. Candidate will be expected to contribute to design and development of System Verilog based verification environment and will be responsible for verification closure of block/chip/system level functions for mixed signal based IP. Experience with System Verilog and functional coverage methodologies are required. Must be willing to follow a disciplined verification methodology and to work closely with a multi-location, international design team. Excellent teamwork and communication skills are required. PREFERRED EXPERIENCE: BSEE with 3-5+ years of design and/or verification experience required, MSEE preferred. Required knowledge and skills: - Expertise in System Verilog required - Good understanding of Digital Signal Processing - Good understanding of Analog and Digital Circuits - Very good analytical/debugging skill - Good verbal and written communication skills Desirable skills: - Knowledge of Verilog-AMS, Perl - Knowledge of verification methodologies including functional coverage and constrained random testing - Knowledge of VLSI design flows & DFT - Familiarity of high level programming language - Experience working with globally distributed team management - Experience in Supervising and mentoring Validation engine
10.
Analog Modeling –Shanghai Job Description A qualified applicant for this position would be responsible to work within a Product Development Team to create behavioral models for Read Channel analog design blocks. Close interaction with the analog and digital design teams is required. Full chip verification of read channel designs which incorporate the analog models is required. Ability to use both digital and analog simulators is required. Must be willing to follow a disciplined design approach and to work closely with a multilocation, international team. Excellent teamwork and communication skills are required Requirements/Qualifications (Education) Minimum of 3 years analog IC design and/or modeling experience in a product development environment Experience with analog and digital Cadence-based simulation tools and SV/AMS modeling language Strong written and verbal communication skills Desired: Read channel application experience 11.
Test Engineer-Shanghai JOB DESCRIPTION: - To support prototype and production releases of new products. Manage debug of test program and hardware and meet product release schedules. - Support test program development for implementing changes in new test methodologies for test coverage improvement. - Pursue Design for Test initiatives to optimize testability and achieve test cost reduction via test time reduction and multiple site test solutions for production release. - Support test chip test development and characterization of new IP used in LSI products. PREFERRED EXPERIENCE: - University graduate students with top scores in GPA - Prior working experiences in the semiconductor industry field, specially in either IDM, Fabless, or Foundry environment - ATE programming skills would be essential - C++ and/or Perl programming skills 12.
Storage Bench Application & Development Engineer JOB DESCRIPTION: - Respond promptly to customer technical issues pertaining to LSI device(s). - Work with customer and/or customer sub-con to reproduce and characterize the customer reported failure. - Perform detailed and extensive experiments and analysis on bench and identify if customer issue is due to LSI device or application / customer test related issue. - Document technical findings with the above mentioned experiments carried out, and update CTSC and other respective LSI internal team members. - Build and maintain effective relationships with your customers and other team members to maintain a technical network capable of resolving customer device issues quickly and effectively. PREFERRED EXPERIENCE: - Basic requirements • A thorough knowledge of electronic circuits and systems with practical experience with analogue and digital semiconductor electronics. • Skilled in hardware and simple circuit design, programming, debugging, and problem solving. • Investigative and analytical mindset, with a desire to understand the technical details of issues and failure mechanism as completely as possible. • Strong interest in electronics and technical work. • Good communication skills, especially in listening and technical writing. • Pleasant personality and must be a good team player. - Formal education • Bachelor in Electrical or Electronics Engineering or better. - Minimum prior work experience • 2 years in R&D, or Applications Engineering, or Failure Analysis in an electronics engineering field. - Special skills required • Disk drive knowledge. ADDITIONAL COMMENTS 13.
Design Validation Engineer JOB DESCRIPTION: - Set up bench test equipment and perform characterization measurements on high speed mixed signal IC's, paying careful attention to measurement accuracy and repeatability and test condition coverage - Develop automated scripts and program test equipment to automate data collection and report generation. Where automated measurements are not practical, manual data collection is to be performed - Design and layout evaluation PCBs, paying careful attention to high speed signals and board component parasitic - Work with design and other characterization teams in design verification and characterization and errata corrective action, as well as work with program management, test and product engineering to insure timely delivery of fully verified silicon - Support bench application engineers with in-depth customer specific measurements and failure analysis - Organize bench data into technical reports for reference and presentation. Presentation of data to both internal and external customers - Manage local subcontractors that perform flip chip and board assembly. Work with program management, design, test and product engineering as part of a product support team to insure timely delivery of fully validated silicon. PREFERRED EXPERIENCE: - Investigative and analytical mindset, with a strong interest in electronics and technical work - A thorough knowledge of electronic circuits and systems with practical experience in analogue and digital electronic circuit design and debug - Knowledge and experience in measurement accuracy and high speed measurements techniques. Experience in RF measurement techniques is a plus - Experience in operating and automation programming: VBS, Labview & TestStand - Experience in Cadence Allegro HDL(Concept) PCB development - Allegro layout experience is a strong plus - Good communication skills, especially in technical writing and reporting |