马上注册，结交更多好友，享用更多功能，让你轻松玩转社区。
您需要 登录 才可以下载或查看，没有账号？注册
x
(Senior) Digital IC Design Engineer （FE Design） Duties • IP design and support for digital baseband of cellular phones • Digital SOC design and integration for chips Requirements • B.Sc. degree or above in Semiconductor, Electronics Engineering areas • 2 years or above design experience in industry • Good knowledge of design flow including documentation, VHDL/verilog coding, code check, equivalence check, synthesis, timing analysis and RTL simulation. • Good knowledge of AMBA AHB/AXI protocol is preferred. • Good knowledge in UPF/IP-XACT based design flow is a big plus. • Hands on experience in digital IC design EDA tools, such as NCSim/Questasim, Design Compiler, Formality, Primetime etc. • Good communication skill, will have frequent communication with foreign teams. • Good written and spoken English is mandatory.
(Senior) Digital IC Design Engineer (Verification) Job Description: • IP verification and support for digital baseband of cellular phones • Digital SOC verification for chips Requirements • B.Sc. degree or above in Semiconductor, Electronics Engineering areas • 2 year or above design experience in industry • Be familiar with the IP-level and system-level verification methodology • Be capable of setting up suitable /complete verification environments and have solid skills of creating complete test cases for target design and debugging tough problems • Good knowledge in low power design and verification is a big plus • Good knowledge of Verilog/VHDL/Assembly/C programming • Be familiar with verification languages such as specman, SystemVerilog and PSL, etc • Good communication skill, will have frequent communication with foreign teams. • Good written and spoken English is mandatory
Senior IC Design Engineer (backend) Job responsibilities: Implements IC design with emphasis on backend tasks, including Synthesis, floorplan, power planning, PnR, CTS, parasitic extraction, STA, and etc under division quality process and autonomously within work plan. Contributes to the definition of the technical documentation. Investigates initiates and puts in place new practices. Evaluates new tools/new technologies Contributes to knowledge sharing within team and outside teams. Helps out with the training linked to deliverables such as design, train the trainers, etc. Tracks what is state-of-the-art knowledge of SoC design. Proposes new solutions and promotes them within division or across organizations. Participates with the peers in different domains to resolve problems. Reports and interfaces with other contributors to the project. Job Qualifications: A BS/MS degree in electrical engineering or related discipline. More than 3 years (for MS) or 4 years (for BS) experience in backend SoC design with proven SoC tapeout experience. Expertise in Synthesis, floorplan, PnR, SI, LP design, CTS in deep sub-macro design. Experience in synopsys/cadence design tools and flows. Experience in data management tools such as DesignSync or Clearcase. Excellent knowledge in scripting languages (Perl, Tcl, Shell, …) and design languages (Verilog/VHDL) Strong timing closing and power optimizing capabilities. Excellent analytical, debugging and solving skill. Open mind, self-motivated, good communication skills and ability to excel in a team environment. Experience in Frontend and DfT is plus Experience in Apache (power analysis) design tools and flows is plus Preferred degree: MS
If you are interested in this opportunity with my client , please feel free to contact me,Carrie Hu, in the strictest of confidence, by email at carrie-hu@kthr.com, or phone : + (86)021-61023600-825, or mobile +  86)139 1607 0643.
You can also contact me via LinkedIn or MSN as follows:
LinkedIn: carrie-hu
MSN/email: mimmimhu@msn.com
We also looking for candidates having experience in analog/Verification/Backend/dft/CAD/software/firmware/Hardware/fae/sales/marketing for other top companies. | 
/2 
eetop公众号
创芯大讲堂
创芯人才网
发表于 2011-4-3 18:06:39
发表于 2011-4-11 00:39:23
