A have not heard of a tool to calculate the mismach.
The method is that: The circuit is designed supposing to tollerate some mismatch that is mentioned in process model documents: These data are statistical and mentioned by the deviation sigma.
In doing layou, we follow some rulles , and we check the layout visually.
the mismatch is a parasitic parameter,you can not get it from layout.;you can only get it from the mismatch model of foundry, the foundry can give us mismatch document, you can calculate the mismatch from it before design and run moanter carlo to verify it