一篇关于SV的paper

edalearner

Abstract—Explores the benefits and limitations of
SystemVerilog interfaces and modports in block-level design.
Identifies key problems of portability, re-use and flexibility in
interface-based design, and suggests a methodology for
adoption of SystemVerilog interfaces and modports that helps
to solve these problems in synthesizable designs.

qqqqpangzi

好东西，感谢楼主的无私分享